IS66WV51216DALL Datasheet, PDF (8/17 Pages) Integrated Silicon Solution, Inc – 8Mb LOW VOLTAGE, ULTRA LOW POWER PSEUDO CMOS STATIC RAM

IS66WV51216DALL
IS66/67WV51216DBLL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
55 ns70 ns
Symbol
Parameter Min. Max.
Min. Max.
Unit
trc
Read Cycle Time
55
—
70
—
ns
taa
Address Access Time
—
55
—
70
ns
toha
Output Hold Time
10
—
10
—
ns
tacs1/tacs2
CS1/CS2 Access Time
—
55
—
70
ns
tdoe
OE Access Time
—
25
—
35
ns
thzoe⁽²⁾
OE to High-Z Output
—
20
—
25
ns
tlzoe⁽²⁾
OE to Low-Z Output
5
—
5
—
ns
t t hzcs1/ hzcs2⁽²⁾ CS1/CS2 to High-Z Output
0
20
0
25
ns
t t lzcs1/ lzcs2⁽²⁾ CS1/CS2 to Low-Z Output
10
—
10
—
ns
tba
LB, UB Access Time
—
55
—
70
ns
thzb
LB, UB to High-Z Output
0
20
0
25
ns
tlzb
LB, UB to Low-Z Output
0
—
0
—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to
Vdd-0.2V/0.4V to Vdd-0.3V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±100 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = Vil, CS2 = WE = Vih, UB or LB = Vil)
ADDRESS
DQ0-D15
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
8
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  A
06/28/2011