24C128 Datasheet, PDF (8/12 Pages) Integrated Silicon Solution, Inc – 131,072-bit 2-WIRE SERIAL CMOS EEPROM

IS24C128
Figure 8. Current Address Read
S
T
R
S
A
E
T
R Device A
O
T Address D
Data
P
SDA
A
Bus
C
Activity
K
M
L
N
S
S
O
B
B
A
R/W
C
K
ISSI ^®
Figure 9. Random Address Read
S
W
S
T
R
T
R
S
A
R
T
Device
Address
I
T
E
Word
Address (n)
Word
Address (n)
A
R
T
Device
Address
E
A
D
Data n
T
O
P
SDA
A
A
A
A
Bus
Activity
C* _*
C
C
C
K
K
K
K
M
L
N
S
S
O
B
B
R/W
* = Don't care bits
A
C
K
DUMMY WRITE
Figure 10. Sequential Read
SDA
Bus
Activity
R
E
Device A
Address D
A
C
K
R/W
Data Byte n
Data Byte n+1
Data Byte n+2
A
A
A
C
C
C
K
K
K
S
T
O
Data Byte n+X _P
N
O
A
C
K
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
PRELIMINARYINFORMATION Rev. 00B
03/11/03