24C128 Datasheet, PDF (3/12 Pages) Integrated Silicon Solution, Inc – 131,072-bit 2-WIRE SERIAL CMOS EEPROM

IS24C128
PIN CONFIGURATION
8-Pin DIP and SOIC
A0 1
A1 2
NC 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
ISSI ^®
14-pin TSSOP
A0
1
A1
2
NC
3
NC
4
NC
5
NC
6
GND
7
14
VCC
13
WP
12
NC
11
NC
10
NC
9
SCL
8
SDA
PIN DESCRIPTIONS
A0-A1
SDA
SCL
WP
Vcc
NC
GND
Address Inputs
Serial Address/Data I/O
Serial Clock Input
Write Protect Input
Power Supply
No Connect
Ground
SCL
This input clock pin is used to synchronize the data
transfer to and from the device.
SDA
The SDA is a Bi-directional pin used to transfer addresses
and data into and out of the device. The SDA pin is an open
drain output and can be wire Or'ed with other open drain
or open collector outputs. The SDA bus requires a pullup
resistor to Vcc.
A0, A1
The A0, and A1 are the device address inputs that are
hardwired or left not connected for hardware compatibility
with the 24C32/64. When pins are hardwired, as many as
four 128K devices may be addressed on a single bus
system. When the pins are not hardwired, the default A0
and A1 are zero.
WP
WP is the Write Protect pin. If the WP pin is tied to Vcc
the entire array becomes Write Protected (Read only).
When WP is tied to GND or left floating, normal read/write
operations are allowed to the device.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
3
PRELIMINARYINFORMATION Rev.00A
03/11/03