IS66WVE1M16EALL-70BLI Datasheet, PDF (7/34 Pages) Integrated Silicon Solution, Inc – 16Mb Async/Page PSRAM

IS66/67WVE1M16EALL/EBLL/ECLL
IS66/67WVE1M16TALL/TBLL/TCLL
Functional Description
In general, this device is high-density alternatives to SRAM and Pseudo SRAM products popular
in low-power, portable applications.
The 16Mb device contains a 16Mb DRAM core organized as 1,048,576 addresses by
16 bits. This device include the industry-standard, asynchronous memory interface found on
other low-power SRAM or PSRAM offerings
Page mode access is also supported as a bandwidth-enhancing extension to the asynchronous
read protocol.
Power-Up Initialization
PSRAM products include an on-chip voltage sensor that is used to launch the power-up
initialization process. Initialization will load the CR with its default settings (see Table 3).
VDD and VDDQ must be applied simultaneously. When they reach a stable level above
VDD, the device will require 150μs to complete its self-initialization process ( see Figure 1).
During the initialization period, CE# should remain HIGH. When initialization is complete,
the device is ready for normal operation.
Figure 1: Power-Up Initialization Timing
VDD
VDD
VDDQ
tPU > 150us
Device Initialization
Device ready for
normal operation
Rev. C | Oct. 2015
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