IS63WV1024BLL Datasheet, PDF (7/17 Pages) Integrated Silicon Solution, Inc – 128K x 8 HIGH-SPEED CMOS STATIC RAM

IS63WV1024BLL
IS64WV1024BLL
ISSI ^®
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
-12 ns
-15 ns
Min. Max.
Min. Max.
Unit
tRC
Read Cycle Time
12
—
15
—
ns
tAA
Address Access Time
—
12
—
15
ns
tOHA
Output Hold Time
3
—
3
—
ns
tACE
CE Access Time
—
12
—
15
ns
tDOE
OE Access Time
—
6
—
7
ns
tLZOE⁽²⁾
OE to Low-Z Output
0
—
0
—
ns
tHZOE⁽²⁾
OE to High-Z Output
0
6
0
6
ns
tLZCE⁽²⁾
CE to Low-Z Output
3
—
3
—
ns
tHZCE⁽²⁾
CE to High-Z Output
0
6
0
6
ns
tPU
CE to Power Up Time
0
—
0
—
ns
tPD
CE to Power Down Time
—
12
—
15
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.25V, input pulse levels of 0.4V to
VDD-0.3V and output loading specified in Figure 1.
2. Tested with the loading specified in Figure 1. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
7
Rev. B
05/10/06