IS61WV51216EDALL Datasheet, PDF (7/19 Pages) Integrated Silicon Solution, Inc – TTL compatible inputs and outputs

IS61WV51216EDALL
IS61/64WV51216EDBLL
AC TEST CONDITIONS
Parameter

Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level (VRef)
Output Load
R1 ( Ω )
R2 ( Ω )
Unit
(2.4V-3.6V)
0.4V to Vdd - 0.3V
1V/ ns
VDD /2
See Figures 1 and 2
1909
1105
Vtm (V)
3.0V
Unit
(3.3V + 5%)
0.4V to Vdd - 0.3V
1V/ ns
VDD + 0.05
2
See Figures 1 and 2
317
351
3.3V
Unit
(1.65V-2.2V)
0.4V to Vdd - 0.3V
1V/ ns
0.9V
See Figures 1 and 2
13500
10800
1.8V
AC TEST LOADS
OUTPUT
ZO = 50Ω
50Ω
VDD/2
30 pF
Including
jig and
scope
Figure 1.
R1
VTM
OUTPUT
5 pF
R2
Including
jig and
scope
Figure 2.
POWER SUPPLY CHARACTERISTICS⁽¹⁾ (Over Operating Range)
-8
Symbol Parameter
Test Conditions Min. Max.
Icc
Vdd Dynamic Operating Vdd = Max.,

Supply Current
Iout = 0 mA, f = fmax

Com. — 45
Ind. — 55
Auto. — —
typ.⁽²⁾
Icc1

Operating
Supply Current
Vdd = Max.,
Iout = 0 mA, f = 0
Com. — 20
Ind. — 25
Auto. — —
Isb1
TTL Standby Current
(TTL Inputs)

Vdd = Max.,
Vin = Vih or Vil
CE ≥ Vih, f = 0
Com. — 20
Ind. — 25
Auto. — —
Isb2
CMOS Standby
Current (CMOS Inputs)


Vdd = Max.,
CE ≥ Vdd – 0.2V,
Vin ≥ Vdd – 0.2V, or
Vin ≤ 0.2V, f = 0
Com. — 10
Ind. — 15
Auto. — —
typ.⁽²⁾
-10
Min. Max.
— 40
— 50
— 65
15
— 20
— 25
— 50
— 20
— 25
— 45
— 10
— 15
— 35
2
-20
Min. Max. Unit
— 30 mA
— 40
— 55
— 20 mA
— 25
— 50
— 20
mA
— 25
— 45
— 10
mA
— 15
— 35
Note:
1. At f = fmax, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at Vdd = 3.0V, Ta = 25^oC and not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com
7
Rev. A
02/20/2013