IS61LV12816L Datasheet, PDF (7/16 Pages) Integrated Silicon Solution, Inc – 128K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV12816L
ISSI ^®
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
ADDRESS
DOUT
t RC
t AA
t OHA
PREVIOUS DATA VALID
t OHA
DATA VALID
READ1.eps
READ CYCLE NO. 2^(1,3)
ADDRESS
OE
CE
LB, UB
t LZCE
DOUT
t LZB
HIGH-Z
t RC
t AA
t DOE
t LZOE
t ACE
t BA
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
t OHA
t HZOE
t HZCE
DATA VALID
t HZB
UB_CEDR2.eps
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
7
Rev. F
10/27/05