IS61QDB22M18A Datasheet, PDF (6/29 Pages) Integrated Silicon Solution, Inc – 1Mx36 and 2Mx18 configuration available

IS61QDB22M18B
IS61QDB21M36B
Power-Up and Power-Down Sequences
The recommendation of voltage apply sequence is : V_DD → V_DDQ ¹⁾→V_REF2)→ V_IN
Notes:
V_DDQ can be applied concurrently with V_DD.
V_REF can be applied concurrently with V_DDQ.
After power and clock signals are stabilized, device can be ready for normal operation after tKC-Lock cycles. In tKC-
lock cycle period, device initializes internal logics and locks DLL. Depending on /Doff status, locking DLL will be
skipped. The following timing pictures are possible examples of power up sequence.
Sequence1. /Doff is fixed low
After tKC-lock cycle of stable clock, device is ready for normal operation.
>tKC-lock for device initialization
Note) All inputs including clocks must be either logically High or Low during Power On stage. Timing above shows only one of cases.
Sequence2. /Doff is controlled and goes high after clock being stable.
>tKC-lock for device initialization
Note) All inputs including clocks must be either logically High or Low during Power On stage. Timing above shows only one of cases.
Integrated Silicon Solution, Inc.- www.issi.com
6
Rev. B
10/02/2014