IS61LV5128AL Datasheet, PDF (5/13 Pages) Integrated Silicon Solution, Inc – 512K x 8 HIGH-SPEED CMOS STATIC RAM

IS61LV5128AL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
ISSI ^®
Symbol
tRC
tAA
tOHA
tACE
tDOE
tHZOE⁽²⁾
tLZOE⁽²⁾
tHZCE⁽²
tLZCE⁽²⁾
tPU
tPD
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
Power Up Time
Power Down Time
-10
-12
Min. Max. Min. Max.
Unit
10 —
12 —
ns
— 10
— 12
ns
2—
2—
ns
— 10
— 12
ns
—4
—5
ns
—4
—5
ns
0—
0—
ns
04
06
ns
3—
3—
ns
0—
0—
ns
— 10
— 12
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
AC TEST LOADS
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
3.3V
319 Ω
OUTPUT
30 pF
Including
jig and
scope
353 Ω
3.3V
319 Ω
OUTPUT
5 pF
Including
jig and
scope
353 Ω
Figure 1
Figure 2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
5
Rev. C
04/15/05