IS49NLC96400A Datasheet, PDF (25/36 Pages) Integrated Silicon Solution, Inc – Reduced cycle time

IS49NLC96400A, IS49NLC18320A, IS49NLC36160A
CK#
CK
CS#
WE#
REF#
ADDRESS
BANK
ADDRESS
BA*
Don’t care
3.10 Command Truth Table
Auto Refresh Command
Operation
Code
CS#
WE#
Device DESELECT/No Operation
DESL/NOP H
X
Mode Register Set
MRS
L
L
Read
READ
L
H
Write
WRITE
L
L
Auto Refresh
AREF
L
H
Notes:
1. X = "Don't Care;" H = logic HIGH; L = logic LOW; A = Valid Address; BA = Valid Bank Address.
2. During MRS, only address inputs A0-A17 are used.
3. Address width changes with burst length.
4. All input states or sequences not shown are illegal or reserved.
5. All command and address inputs must meet setup and hold times around the rising edge of CK.
REF#
X
L
H
H
L
Ax
X
OPCODE
A
A
X
BAx
X
X
BA
BA
BA
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00A, 9/10/2014
25