IS93C46D Datasheet, PDF (14/16 Pages) Integrated Silicon Solution, Inc – 1-KBIT SERIAL ELECTRICALLY ERASABLE PROM

PACKAGING INFORMATION
Dual Flat No-Lead
Package Code: D (8-pad)
A
D2
b
(8X)
tie bars⁽³⁾
Pad 1 ID
L (8X)
D
e (6X)
A2
A1
1.50 REF.
A3
Pad 1 index area
DFN
MILLIMETERS
Sym. Min. Nom. Max.
N0.
Pad
8
D
2.00 BSC
E
3.00 BSC
D2
1.50 — 1.75
E2
1.60 — 1.90
A
0.70 0.75 0.80
A1
0.0 0.02 0.05
A2
— — 0.75
A3
0.20 REF
L
0.30 0.40 0.50
e
0.50 BSC
b
0.18 0.25 0.30
Notes:
1. Refer to JEDEC Drawing MO-229.
2. This is the metallized terminal and
is measured between 0.18 mm
and 0.30 mm from the terminal tip.
The terminal may have a straight
end instead of rounded.
3. Package may have exposed tie
bars, ending flush with package
edge.
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
02/13/06