IRFB4229PBF Datasheet, PDF (6/8 Pages) International Rectifier – PDP SWITCH

IRFB4229PbF
D.U.T
+
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
+
‚
-

R_G
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
D.U.T. I_SD Waveform
Reverse
-^„ +
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V_DS Waveform _{Diode Recovery}
dv/dt
*
• dv/dt controlled by R_G
• Driver same type as D.U.T.
V_DD
Re-Applied
** ^{+ Voltage}
Body Diode Forward Drop
• I_SD controlled by Duty Factor "D"
-
• D.U.T. - Device Under Test
Inductor Curent
Ripple ≤ 5%
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel
*** V_GS = 5V for Logic Level Devices
V^*_G^*_S^*=10V
V_DD
I_SD
Fig 18. Diode Reverse Recovery Test Circuit for HEXFET^® Power MOSFETs
15V
VDS
L
DRIVER
RG
2V0GVS
tp
D.U.T
I_AS
0.01Ω
+
- ^VDD
A
Fig 19a. Unclamped Inductive Test Circuit
V_(BR)DSS
tp
I_AS
Fig 19b. Unclamped Inductive Waveforms
L
VCC
DUT
0
1K
Vds
Vgs(th)
Id
Vgs
Fig 20a. Gate Charge Test Circuit
Qgs1 Qgs2 Qgd
Qgodr
Fig 20b. Gate Charge Waveform
6
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