CHL8550 Datasheet, PDF (5/15 Pages) International Rectifier – High.Efficiency Variable Gate MOSFET Driver

PIN DESCRIPTIONS
High‐Efficiency Variable Gate MOSFET Driver
CHL8550
PIN#
1
2
3
4
5
6
7
8
9
10
PAD (11)
PIN NAME
PIN DESCRIPTION
PWM
VCC
LVCC
HVCC
BOOT
HI_GATE
SWITCH
LO_GATE
NC
NC
GND
The PWM signal is the control input for the driver from a 1.8V IR ATL‐based PWM signal. Connect this pin
to the PWM output of the controller.
Connect this pin to a +5V bias supply. Place a high quality low ESR ceramic capacitor from this pin to GND.
Connect this pin to a separate supply voltage between 4.0V and 13.2V to vary the drive voltage on the
low‐side MOSFETs. Place a high quality low ESR ceramic capacitor from this pin to GND.
Connect this pin to a separate supply between 4.0V and 13.2V to provide a lower gate drive voltage on the
high‐side MOSFETS. This is the anode of the internal bootstrap diode. Place a high quality low ESR ceramic
capacitor from this pin to GND.
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and
the SWITCH pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal
Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
Upper gate drive output. Connect to gate of high‐side power N‐Channel MOSFET.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET.
This pin provides a return path for the upper gate drive
Lower gate drive output. Connect to gate of the low‐side power N‐Channel MOSFET.
Leave this pin floating.
Leave this pin floating.
Bias and reference ground. All signals are referenced to this node. It is also the power ground return
of the driver.
5 December 6, 2011 | FINAL | V1.05