AUIRFI3205 Datasheet, PDF (5/11 Pages) International Rectifier – Advanced Planar Technology

AUIRFI3205
8000
7000
6000
5000
4000
V_GS = 0V,
f = 1MHz
C_iss = C_gs + C_gd , C_ds SHORTED
C_rss = C_gd
C_oss = C_ds + C_gd
Ciss
Coss
3000
2000
1000
Crss
0
A
1
10
100
V_DS , Drain-to-Source Voltage (V)
20
I_D = 59A
16
12
V _DS = 44V
V _DS = 28V
V _DS = 11V
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
30
60
90
120
150
180
Q _G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
T_J = 175°C
100
T_J = 25°C
10
0.6
V_GS = 0V _A
1.0
1.4
1.8
2.2
2.6
3.0
V_SD , Source-to-Drain Voltage (V)
1000
100
OPERATION IN THIS AREA LIMITED
BY R_DS(on)
10μs
100μs
1ms
10
10ms
T_C = 25°C
T_J = 175°C
Single Pulse
1
1
10
V_DS , Drain-to-Source Voltage (V)
A
100
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
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5