ISL78215 Datasheet, PDF (9/11 Pages) Intersil Corporation – Improved Industry Standard Single-Ended Current Mode PWM Controller

ISL78215
Gate Drive
The ISL78215 is capable of sourcing and sinking 1A peak
current. To limit the peak current through the IC, an
optional external resistor may be placed between the
totem-pole output of the IC (OUT pin) and the gate of
the MOSFET. This small series resistor also damps any
oscillations caused by the resonant tank of the parasitic
inductances in the traces of the board and the FET’s input
capacitance.
Slope Compensation
For applications where the maximum duty cycle is less
than 50%, slope compensation may be used to improve
noise immunity, particularly at lighter loads. The amount
of slope compensation required for noise immunity is
determined empirically, but is generally about 10% of the
full scale current feedback signal. For applications where
the duty cycle is greater than 50%, slope compensation
is required to prevent instability. The minimum amount
of slope compensation required corresponds to 1/2 the
inductor downslope. Adding excessive slope
compensation, however, results in a control loop that
behaves more as a voltage mode controller than as a
current mode controller.
DOWNSLOPE
CURRENT SENSE SIGNAL
Slope compensation may be added to the CS signal
shown in Figure 7.
RTCT
VREF
CS
FIGURE 7. SLOPE COMPENSATION
Fault Conditions
A Fault condition occurs if VREF falls below 4.65V. When
a Fault is detected, OUT is disabled. When VREF exceeds
4.80V, the Fault condition clears, and OUT is enabled.
Ground Plane Requirements
Careful layout is essential for satisfactory operation of
the device. A good ground plane must be employed. A
unique section of the ground plane must be designated
for high di/dt currents associated with the output stage.
V_DD should be bypassed directly to GND with good high
frequency capacitors.
TIME
FIGURE 6. CURRENT SENSE DOWNSLOPE
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FN7673.0
August 16, 2010