ISL6531 Datasheet, PDF (9/17 Pages) Intersil Corporation – Dual 5V Synchronous Buck Pulse-Width Modulator (PWM) Controller for DDRAM Memory VDDQ and VTT Termination

ISL6531
One method that may be employed to bypass the internal
V_TT reference generation is to supply an external reference
directly to the VREF_IN pin. When doing this the SENSE1
pin must remain unconnected. Caution must be exercised
when using this method as the V_TT regulator does not
employ a soft start of its own.
A second method would be to overdrive the internal
resistors. Figure 3 shows how to implement this method. The
external resistors used to overdrive the internal resistors
should be less than 2kΩ and have a tolerance of 1% or
better. This method still supplies a buffer between the
resistor network and any loading on the VREF pin. If there is
no loading on the VREF pin, then no buffering is necessary
and the reference voltage created by the resistor network
can be tied directly to VREF.
V_DDQ
R_A
R_B
ISL6531
SENSE1
VREF_IN
VREF ₊
-
TO ERROR
AMPLIFIER
FIGURE 4. V_TT REFERENCE OVERDRIVE
Converter Shutdown
Pulling and holding the OCSET/SD pin below 0.8V will
shutdown both regulators. During this state, PGOOD will be
held LOW. Upon release of the OCSET/SD pin, the IC enters
into a soft start cycle which brings both outputs back into
regulation.
Voltage Monitoring
The ISL6531 offers a PGOOD signal that will communicate
whether the regulation of both V_DDQ and V_TT are within
±15% of regulation, the V2_SD pin is held low and the bias
voltage of the IC is above the POR level. If all the criteria
above are true, the PGOOD pin will be at a high impedence
level. When one or more of the criteria listed above are false,
the PGOOD pin will be held low.
Overcurrent Protection
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET on-resistance, r_DS(ON), of
V_DDQ to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R_OCSET)
programs the overcurrent trip level (see Figure 1). An internal
40µA (typical) current sink develops a voltage across R_OCSET
that is referenced to V_IN. When the voltage across the upper
MOSFET of V_DDQ (also referenced to V_IN) exceeds the
voltage across R_OCSET , the overcurrent function initiates a
soft-start sequence.
Figure 5 illustrates the protection feature responding to an
overcurrent event on V_DDQ. At time t0, an overcurrent
condition is sensed across the upper MOSFET of the V_DDQ
regulator. As a result, both regulators are quickly shutdown
and the internal soft-start function begins producing soft-
start ramps. The delay interval seen by the output is
equivalent to three soft-start cycles. The fourth internal soft-
start cycle initiates a normal soft-start ramp of the output, at
time t1. Both outputs are brought back into regulation by time
t2, as long as the overcurrent event has cleared.
Had the cause of the overcurrent still been present after the
delay interval, the overcurrent condition would be sensed
and both regulators would be shut down again for another
delay interval of three soft start cycles. The resulting hiccup
mode style of protection would continue to repeat
indefinitely.
V_DDQ (2.5V)
V_TT (1.25V)
0V
INTERNAL SOFT-START FUNCTION
DELAY INTERVAL
T0
T1
T2
TIME
FIGURE 5. OVERCURRENT PROTECTION RESPONSE
The overcurrent function will trip at a peak inductor current
(I_PEAK) determined by:
I_PEAK
=
I_{--O-----C----S----E----T-----}x_-----R_{-----O----C-----S----E---T--}
r_DS(ON)
where I_OCSET is the internal OCSET current source (40µA
typical). The OC trip point varies mainly due to the MOSFET
r_DS(ON) variations. To avoid overcurrent tripping in the
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