ISL59446 Datasheet, PDF (9/13 Pages) Intersil Corporation – 500MHz Triple 4:1 Gain-of-2, Multiplexing Amplifier

ISL59446
Pin Descriptions
ISL59446
(32 LD QFN)
PIN NAME
1
IN1A
2, 4, 8, 13, 15, 24,
NIC
28, 30
3
IN1B
5
IN1C
6
GNDB
7
IN2A
9
IN2B
10
IN2C
11
GNDC
12
IN3A
14
IN3B
16
IN3C
17
S1
18
S0
19
OUTC
20
OUTB
21
V-
22
OUTA
23
V+
25
ENABLE
26
HIZ
27
IN0C
29
IN0B
31
IN0A
32
GNDA
EQUIVALENT
CIRCUIT
Circuit 1
Circuit 1
Circuit 1
Circuit 4
Circuit 1
Circuit 1
Circuit 1
Circuit 4
Circuit 1
Circuit 1
Circuit 1
Circuit 2
Circuit 2
Circuit 3
Circuit 3
Circuit 4
Circuit 3
Circuit 4
Circuit 2
Circuit 2
Circuit 1
Circuit 1
Circuit 1
Circuit 4
DESCRIPTION
Channel 1 input for output amplifier "A"
Not Internally Connected; it is recommended these pins be tied to ground to minimize
crosstalk.
Channel 1 input for output amplifier "B"
Channel 1 input for output amplifier "C"
Ground pin for output amplifier “B”
Channel 2 input for output amplifier "A"
Channel 2 input for output amplifier "B"
Channel 2 input for output amplifier "C"
Ground pin for output amplifier “C”
Channel 3 input for output amplifier "A"
Channel 3 input for output amplifier "B"
Channel 3 input for output amplifier "C"
Channel selection pin MSB (binary logic code)
Channel selection pin. LSB (binary logic code)
Output of amplifier “C”
Output of amplifier “B”
Negative power supply
Output of amplifier “A”
Positive power supply
Device enable (active low). Internal pull-down resistor ensures device is active with no
connection to this pin. A logic High puts device into power-down mode and only the logic
circuitry is active. Logic states are preserved post power-down.
Output disable (active high). Internal pull-down resistor ensures the device will be active with
no connection to this pin. A logic high, puts the outputs in a high impedance state. Use this
state to control logic when more than one MUX-amp share the same video output line.
Channel 0 for output amplifier "C"
Channel 0 for output amplifier "B"
Channel 0 for output amplifier "A"
Ground pin for output amplifier “A”
V+
V+
IN
LOGIC PIN
21k
+
1.2V
-
GND
33k
V-
V-
CIRCUIT 1
CIRCUIT 2
V+
OUT
V-
CIRCUIT 3
V+
GNDA
GNDB
GNDC
V-
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4
THERMAL HEAT SINK PAD
V-
~1MΩ
SUBSTRATE
9
FN6261.1
August 26, 2010