ISL59446 Datasheet, PDF (10/13 Pages) Intersil Corporation – 500MHz Triple 4:1 Gain-of-2, Multiplexing Amplifier

ISL59446
AC Test Circuits
V_IN
50Ω
or
75Ω
ISL59446
L_CRIT
x2
*C_L
1.1pF
R_L
500Ω, or
150Ω
V_OUT
*C_L Includes PCB trace capacitance
FIGURE 29A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD
ISL59446
L_CRIT
V_IN
x2
50Ω
R_S
or
C_L
C_S
75Ω
R_L
500Ω, or
75Ω
FIGURE 29B. INTER-STAGE APPLICATION CIRCUIT
V_IN
50Ω
ISL59446
L_{CRIT RS}
x2
475Ω
*C_L
1.1pF
56.2Ω
TEST
EQUIPMENT
50Ω
*C_L Includes PCB trace capacitance
FIGURE 29C. 500Ω TEST CIRCUIT WITH 50Ω LOAD
V_IN
50Ω,or
75Ω
ISL59446
L_{CRIT RS}
x2
*C_L ^118Ω
2.1pF
86.6Ω
TEST
EQUIPMENT
50Ω
*C_L Includes PCB trace capacitance
FIGURE 29D. 150Ω TEST CIRCUIT WITH 50Ω LOAD
ISL59446
L_{CRIT RS}
V_IN
x2
50Ω
50Ω or 75Ω
or
*C_L
75Ω
2.1pF
TEST
EQUIPMENT
50Ω or 75Ω
*C_L Includes PCB trace capacitance
FIGURE 29E. BACKLOADED TEST CIRCUIT FOR 75Ω VIDEO
CABLE APPLICATION
AC Test Circuits
Figures 29C and 29D illustrate the optimum output load for
testing AC performance at 500Ω and 150Ω loads.
Figure 29E illustrates the optimum output load for 50Ω and
75Ω cable-driving.
Application Information
General
Key features of the ISL59446 include a fixed gain of 2,
buffered high impedance analog inputs and excellent AC
performance at output loads down to 150Ω for video
cable-driving. The current feedback output amplifiers are
stable operating into capacitive loads.
For the best isolation and crosstalk rejection, all GND pins
and NIC pins must connect to the GND plane.
AC Design Considerations
High speed current-feed amplifiers are sensitive to
capacitance at the inverting input and output terminals. The
ISL59446 has an internally set gain of 2, so the inverting
input is not accessible. Capacitance at the output terminal
increases gain peaking (Figure 1) and pulse overshoot
(Figures 19 and 20). The AC response of the ISL59446 is
optimized for a total output capacitance of up to 2.1pF over
the load range of 150Ω to 500Ω. When PCB trace
capacitance and component capacitance exceed 2pF, pulse
overshoot becomes strongly dependent on the input pulse
amplitude and slew rate. This effect is shown in Figures 19
and 20, which show approximate pulse overshoot as a
function of input slew rate and output capacitance. Fast
pulse rise and fall times (<150ns) at input amplitudes above
0.2V, cause the input pulse slew rate to exceed the
1600V/µs output slew rate of the ISL59446. At 125ps rise
time, pulse input amplitudes >0.2V cause slew rate limit
operation. Increasing levels of output capacitance reduce
stability resulting in increased overshoot, and settling time.
PC board trace length should be kept to a minimum in order
to minimize output capacitance and prevent the need for
controlled impedance lines. At 500MHz trace lengths
approaching 1” begin exhibiting transmission line behavior
and may cause excessive ringing if controlled impedance
traces are not used. Figure 29A shows the optimum
inter-stage circuit when the total output trace length is less
than the critical length of the highest signal frequency.
For applications where pulse response is critical and where
inter-stage distances exceed L_CRIT, the circuit shown in
Figure 29B is recommended. Resistor R_S constrains the
capacitance seen by the amplifier output to the trace
capacitance from the output pin to the resistor. Therefore,
R_S should be placed as close to the ISL59446 output pin as
possible. For inter-stage distances much greater than L_CRIT,
the back-loaded circuit shown in Figure 29E should be used
with controlled impedance PCB lines, with R_S and R_L equal
to the controlled impedance.
For applications where inter-stage distances are long, but
pulse response is not critical, capacitor C_S can be added to
low values of R_S to form a low-pass filter to dampen pulse
overshoot. This approach avoids the need for the large gain
correction required by the -6dB attenuation of the
10
FN6261.1
August 26, 2010