CD4014BMS Datasheet, PDF (9/9 Pages) Intersil Corporation – CMOS 8-Stage Static Shift Registers

CD4014BMS, CD4021BMS
Typical Performance Characteristics (Continued)
10⁵ ₆
4
2
10⁴ ₈
6
4
2
10³
8
6
4
SUPPLY VOLTAGE
(VDD) = 15V
10V
10V
5V
2
10² ₈
6
4
CL = 50pF
CL = 15pF
2
AMBIENT TEMPERATURE (T_A) = +25^oC
10
2 4 6 8 2 4 68
2 4 68 2 4 68 2 4 68
1
10
10²
10³
10⁴
10⁵
CLOCK INPUT FREQUENCY (fCL) (kHz)
FIGURE 9. TYPICAL POWER DISSIPATION AS A FUNCTION OF FREQUENCY
Chip Dimensions and Pad Layouts
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10^-3 inch)
METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
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