82C88_05 Datasheet, PDF (9/11 Pages) Intersil Corporation – CMOS Bus Controller

Timing Waveforms (Note 3) (Continued)
CEN
82C88
AEN
DEN
PDEN
TAEVNV (22)
TCEVNV (23)
FIGURE 2. DEN, PDEN QUALIFICATION TIMING
AEN
1.5V
TAELCV
(21)
1.5V
OUTPUT
COMMAND
TAELCH (19)
VOH
TAEHCZ (20)
0.5V VOH
CEN
TCELRH
(24)
TCELRH (24)
CEN MUST BE LOW OR INVALID PRIOR TO T2 TO PREVENT THE COMMAND FROM BEING GENERATED.
FIGURE 3. ADDRESS ENABLE (AEN) TIMING (THREE-STATE ENABLE/DISABLE)
NOTES:
1. Address/Data Bus is shown only for reference purposes.
2. Leading edge of ALE and MCE is determined by the falling edge of CLK or status going active. Whichever occurs last.
3. All timing measurements are made at 1.5V unless otherwise specified.
9
FN2979.2
August 25, 2005