82C88_05 Datasheet, PDF (7/11 Pages) Intersil Corporation – CMOS Bus Controller

82C88
AC Testing Input, Output Waveform
INPUT
V_IH +0.4V
1.5V
V_IL -0.4V
OUTPUT
V_OH
1.5V
V_OL
A.C. Testing: All input signals (other than CLK) must switch
between V_IL -0.4V and V_IH +0.4. CLK must switch between 0.4V
and V_CC -0.4V. Input rise and fall times are driven at 1ns/V.
A.C. Test Circuit
V1
OUTPUT FROM
DEVICE
UNDER TEST
NOTE:
INCLUDES STRAY AND JIG CAPACITANCE
R1
TEST
POINT
C1 (SEE NOTE)
TABLE 2. TEST CONDITION DEFINITION TABLE
TEST CONDITION
V1
R1
C1
1
2.13V
220Ω
80pF
2
2.29V
91Ω
300pF
3
1.5V
187Ω
300pF
4
1.5V
187Ω
50pF
7
FN2979.2
August 25, 2005