X1286_06 Datasheet, PDF (8/25 Pages) Intersil Corporation – Intersil Real Time Clock/Calendar/CPU Supervisor with EEPROM

X1286
DESCRIPTION
The X1286 device is a Real Time Clock with clock/calendar,
two polled alarms with integrated 32kx8 EEPROM, oscillator
compensation, and battery backup switch.
The oscillator uses an external, low-cost 32.768kHz
crystal. All compensation and trim components are
integrated on the chip. This eliminates several external
discrete components and a trim capacitor, saving board
area and component cost.
The Real-Time Clock keeps track of time with separate
registers for Hours, Minutes, Seconds and 1/100 of a
second. The Calendar has separate registers for Date,
Month, Year and Day-of-week. The calendar is correct
through 2099, with automatic leap year correction.
The powerful Dual Alarms can be set to any
Clock/Calendar value for a match. For instance, every
minute, every Tuesday, or 5:23 AM on March 21. The
alarms can be polled in the Status Register or provide
a hardware interrupt (IRQ Pin). There is a repeat
mode for the alarms allowing a periodic interrupt.
The PHZ/IRQ pin may be software selected to provide
a frequency output of 1 Hz, 100 Hz, or 32,768 Hz.
The device offers a backup power input pin. This
V_BACK pin allows the device to be backed up by
battery or SuperCap. The entire X1286 device is fully
operational from 2.7 to 5.5 volts and the
clock/calendar portion of the X1286 device remains
fully operational down to 1.8 volts (Standby Mode).
The X1286 device provides 256K bits of EEPROM with 8
modes of BlockLock™ control. The BlockLock allows a
safe, secure memory for critical user and configuration
data, while allowing a large user storage area.
PIN DESCRIPTIONS
X1286
8-pin EIAJ SOIC
14- pin TSSOP
X1 1
X2 ²
PHZ/IRQ 3
V_SS
4
8 V_CC
7
V_BACK
6 SCL
5 SDA
X1 ₁
X2 2
NC ₃
NC ₄
NC 5
PHZ/IRQ 6
V_{SS 7}
14 ^VCC
13
V_BACK
12 ^NC
11 ^NC
10 ^NC
9 ^SCL
8 SDA
Serial Clock (SCL)
The SCL input is used to clock all data into and out of
the device. The input buffer on this pin is always active
(not gated).
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It has an open drain output and may
be wire ORed with other open drain or open collector
outputs. The input buffer is always active (not gated).
An open drain output requires the use of a pull-up
resistor. The output circuitry controls the fall time of the
output signal with the use of a slope controlled pull-
down. The circuit is designed for 400kHz 2-wire inter-
face speed.
V_BACK
This input provides a backup supply voltage to the
device. V_BACK supplies power to the device in the
event the V_CC supply fails. This pin can be connected
to a battery, a Supercap or tied to ground if not used.
Programmable Frequency/Interrupt Output – PHZ/IRQ
This is either an output from the internal oscillator or an
interrupt signal output. It is a CMOS output.
When used as frequency output, this signal has a fre-
quency of 32.768kHz, 100Hz, 1Hz or inactive.
When used as interrupt output, this signal notifies a
host processor that an alarm has occurred and an
action is required. It is an active LOW output.
The control bits for this function are FO1 and FO0 and
are found in address 0011h of the Clock Control Mem-
ory map. See “Programmable Frequency Output
Bits—FO1, FO0” on page 13.
X1, X2
The X1 and X2 pins are the input and output,
respectively, of an inverting amplifier. An external
32.768kHz quartz crystal is used with the X1286 to
supply a timebase for the real time clock. The
recommended crystal is a Citizen CFS206-32.768KDZF.
Internal compensation circuitry is included to form a
complete oscillator circuit. Care should be taken in the
placement of the crystal and the layout of the circuit.
Plenty of ground plane around the device and short
traces to X1 and X2 are highly recommended. See
Application section for more recommendations.
8
FN8101.1
April 14, 2006