ISL6560 Datasheet, PDF (8/14 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Two-Phase Buck PWM Controller

ISL6560
Design Example
This section will highlight a 40A converter, providing the
design details for the entire supply. The hardware realization
of this design is the ISL6560/62 Evaluation Board. For this
example a 40A supply down converting from 12V will be
discussed. 5V operation is also viable as an input source.
Oscillator frequency is 350kHz, with a channel frequency of
175kHz. The ISL6560 has an internal DAC with VRM 9.0
VID codes. An output voltage of 1.8V, near the maximum
output voltage will be used to determine the selection of
inductors. Output voltage droop from no-load to full load
specification is ~65mv. This sets the effective DC output
resistance, (R_OUT) to be 65mV/40A = 1.63mΩ.
Inductor Selection
Each channel handles half of the 40A output. An inductor
ripple current of 40% of the output current or 8A p-p/channel
was selected. There is always a compromise between ripple
current and regulator performance. Higher values of ripple
current, as expected, result in slightly greater dissipation in
series pass transistors and losses in other resistive elements
in the power path. These disadvantages are offset by
improved transient response, with lower values of output
capacitors and less output voltage overshoot when the
output current is step reduced from heavy load conditions.
This overshoot is primarily contributed by the energy stored
in the output filter network and is not highly influenced by the
control loop.
To assist in the selection of the output inductors, two curves
are provided. Figure 4 deals with the selection of the voltage
terms in the equation:
L = ^{(VIN - VOUT) VOUT}
fsw x ∆I_L V_IN
Where: L = inductor value
V_IN = input voltage
V_OUT = output voltage or CORE Voltage
fsw = oscillator frequency/2 (for each channel)
∆I_L= inductor ripple current
The (V_IN - V_OUT) term is the voltage across the inductor and
the V_OUT/V_IN term is the converter duty cycle.
The curve of Figure 4 reduces the voltage terms to a single
voltage term, “K”. To further enhance readability of the curves,
the lower portion of Figure 4 was expanded in Figure 5 for output
voltages up to only 3.5V. The dotted lines show the selection of
an output voltage of 1.8V. With 12V input, K = 1.55V.
The curve of Figure 6 shows with the selection of the inductor
value. Initially a ripple current of 40% of the full load current was
established. Each channel contributes 20A, for a ripple current,
∆I_L, of 8A. From this, the value entered into the left-hand axis of
Figure 6 is 1.55V/8A = 0.19. With a channel operating
frequency of 200kHz, the inductor value will be 900nH, as
shown by the dotted lines. This curve shows how you can
modify the inductor value by changing the ripple current since
the “K” term is fixed by the input output design criteria.
3.5
L = ^{(VIN - VOUT) VOUT}
fsw x ∆I_L V_IN
3.0
L= ^K
fsw x ∆I_L
2.5
K = ^{(VIN - VOUT) VOUT}
V_IN
V_IN = 12V
V_IN = 10V
2.0
1.5
V_IN = 8V
V_IN = 5V
1.0
V_IN = 3.3V
0.5
0
0
2
4
6
8
10
12
V_OUT (VOLTS)
FIGURE 4. “K” AS A FUNCTION OF V_OUT FOR
FAMILIES OF V_IN
2.5
V_IN = 12V
2.0
V_IN = 8V
1.5
V_IN = 10V
V_IN = 5V
1.0
V_IN = 3.3V
0.5
0
0
0.5 1.0 1.5
2.0 2.5
3.0 3.5
V_OUT (VOLTS)
FIGURE 5. EXPANSION OF FIGURE 4 FOR V_OUT < 3.5V
8
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