ISL6560 Datasheet, PDF (12/14 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Two-Phase Buck PWM Controller

ISL6560
2. Current sense is critical, especially at lower current levels
where the current comparator threshold voltage is lower.
A good Kelvin connection requires that the voltage
sample must be taken at the R_SENSE resistor ends, and
not at the planes to which the resistor is connected.
3. The lines to the current sense resistor should be parallel
and run away from the PHASE or PWM signals to prevent
coupling of spikes to the current comparator input that
may delay or advance triggering of the comparator.
Parallel routing will work towards equal exposure for both
lines, so that the comparator common mode rejection
characteristic will reduce the influence of coupled noise.
4. Place the current sense filter network near the controller.
This will help reduce extraneous inputs to the comparator.
5. Make sure the DC plus pulse voltage inputs to the current
sense comparator, CS+ and CS-, do not exceed the
voltage on the VCC pin by more than the specified limit of
VCC + 0.3V.
Voltage Sampling
1. To obtain optimum regulation use the Kelvin connection
for the input voltage sample as shown in Figure 11. The
ground connection, Pin 9 of the ISL6560 should be
connected to the system ground at the load.
2. The two voltage sampling lines described in item 1 above
should also be routed away from any high-current or high-
pulse voltages such as the phase lines or pads. Doing
this will reduce the possibility of coupling undesired
pulses into the feedback signal and either modifying the
output of the error amplifier or, if of sufficient amplitude,
spuriously triggering the current comparator by
readjusting the threshold voltage.
Other Considerations
1. Keep the leads to the timing capacitor connected to pin
CT short and return the ground directly to Pin 9.
2. When using a transistor to disable the converter by
pulling the CT pin to ground, place the transistor close to
the CT pin to minimize extraneous signal pickup.
3. As in all designs, keep decoupling networks near the pins
that must be decoupled. For example, the
decoupling/filter network on the FB input. The series
resistor should be located next to the FB pin.
4. Large power and ground planes are critical to keeping
performance and efficiency high. Consider a 1mΩ
resistance in a 40A supply line. With 1.8V output, this
results in slightly over 2% power loss in the 72W supply.
12V
+V_IN
Keep Leads Together
& Away from Output
Place Near Drains of the
Output Transistors
1 VID4
VCC 16
Input
VID Codes
from
Processor _{{
2 VID3
3 VID2
4 VID1
REF 15
CS- 14
PWM1 13
5 VID0 PWM2 12
6 COMP CS+ 11
7 FB PWRGD 10
8 CT
GND 9
ISL6560
Locate
Parts
Next to IC
Locate
Parts
Next
to IC
1 UGATE PHASE 8
2 BOOT PVCC 7
3 PWM
VCC 6
4 GND LGATE 5
HIP6601ECB
Try to return bypass
capacitors to ground
of lower MOSFETs
+V_CORE
FIGURE 11. SCHEMATIC DIAGRAM SHOWING ONLY ONE CHANNEL OF ‘IDEAL’ COMPONENT PLACEMENT
12
FN9011.3