ISL6401_14 Datasheet, PDF (8/11 Pages) Intersil Corporation – Synchronizing Current Mode PWM for Subscriber Line Interface Circuits (SLICs)

ISL6401
Switching losses are the result of overlapping drain current
and source voltage at turn-off. The drain voltage begins to
rise only after the miller capacitance of the device begins to
discharge. This discharging time is a function of the external
gate resistance, Rgate and the gate-to-drain miller charge
Qgd, as shown in the following equation,
T miller = (Qgd)(R_GATE)/(Vdd-Vth),
where Vth is the turn ON threshold voltage of the gate.
The power loss due to the external capacitance of the
MOSFET also contributes to the total switching losses,
which can be calculated as shown.
P_switching=
F_sw
C_{-----o---s---s-----}×_----V_{-----D----S----(--s---t--r--e---s---s---)--}2_--
2
+
V_DS
(s
t
re
ss
)
+ I_{peak(primary)} + t_miller
During turn on there is no overlap of drain voltage and
current because there is no current in a discontinuous
current mode converter at turn-on. Minimal losses also occur
during the off-time of the FET due to the leakage current.
P_{off (time)} = (1 - D_max)(I_leak)(V_ds(stress))
Output and Input Capacitors
Output capacitors are selected based upon their value,
equivalent series resistance (ESR), equivalent series
inductance and capacitor ripple current rating. The capacitor
value controls the peak-to-peak output ripple voltage at the
switching frequency. Assuming a linear decay of the
capacitor voltage during the off time, during which the
capacitor must supply the load current, the minimum value of
the output capacitor can be calculated as follows,
Cout = [(T- T_ON(max))(Iout)] / Vripple),
where Vripple is the acceptable peak-to peak output voltage
ripple. However, there are practical limitations to how low a
single stage output filter can reduce the ripple voltage and
sometimes an extra LC filter stage is necessary. This second
stage filter would also reduce the output high frequency noise.
Parasitic resistance and inductance in the output capacitors
tend to make the ripple voltage much greater than expected,
based upon the above equation. Using capacitors with the
lowest possible ESR and ESL helps reduce high frequency
ripple. The rms ripple current that the output capacitors
experience is not the same as the secondary side rms output
current; it is the AC portion of it. The secondary side rms
current is in the shape of a clipped sawtooth, or trapezoid,
where the output capacitor’s current waveform is in the shape
of right triangle. Therefore, the typical capacitor ripple current
rating the output capacitor must meet is equal to,
Irms = (Ipeak)


T_-----r_--e_-T---s_---e_----t_




-^--⁴-----–-----^(-----3--------⁾----₁⁽------^T2------^T--^r----^e--------^s-------^e-------t------⁾-^--_{}


where Ipeak (sec) is the peak-secondary current and t_RESET
is equal to the off-time of the switch. The same selection
criteria is used for the input capacitor, keeping in mind these
capacitors must also be rated to handle the maximum input
voltage.
Output Voltage
The output voltage can be set by a feedback resistor divider
network. The output is resistively divided and compared to
the reference voltage. For negative flyback output
applications, the sensed output will be fed to the NFB IN pin.
The sensed voltage in inverted, and this positive voltage is
fed to the FB- inverting input pin of the error amplifier. The
non-inverting input of the error amplifier will be a reference
voltage. So, when FB- is higher than REF voltage, the output
drivers are turned off. The opposite happens when the
resistively divided output voltage falls below the 1.24V
reference voltage.
Output Diode
The output diode in a flyback converter is subject to large
peak and rms current stresses. Schottky diodes are
recommended, because of their low forward-voltage drop and
the virtual absence of minority carrier reverse recovery. The
secondary-side Schottky rectifier was selected to meet the
working peak-reverse voltage, the peak repetitive forward-
current and the average forward-current of the application.
The working peak-reverse voltage Vrev, or blocking voltage, is
calculated according to the following equation:
V_R = [(V_INmax + V_RDSon) / N ]+ V_OUT
The reflected peak primary current constitutes the peak
repetitive forward-current through the diode. Because all
current to the output capacitors and load must flow through
the diode, the average forward diode current is equal to the
steady-state load current. Power loss in the Schottky is the
sum of the conduction losses and reverse leakage losses.
Conduction losses are calculated using the forward voltage
drop across the diode and the average forward-current.
Reverse leakage losses are dependent upon the reverse
leakage-current, the blocking voltage, and the on-time of
the FET.
Determining the Turns Ratio of the Flyback
Transformer
The turns ratio of the flyback transformer can be calculated
by using the this steady-state volt-second approach:
n = [(V_INmin - V_DS)(D_max)(T)] / [(V_OUT + V_F)(0.8 - D_max)(T)]
8
FN9007.7
April 13, 2005