ISL5740 Datasheet, PDF (8/12 Pages) Intersil Corporation – 3V Dual 10-Bit, 20/40/60MSPS A/D Converter with Internal Voltage Reference

Timing Waveforms
ANALOG
INPUT
ISL5740
CLOCK
INPUT ^SN - 1 ^HN - 1 ^SN
H_N S_{N + 1} H_{N + 1} S_{N + 2}
S_{N + 5} H_{N + 5} S_{N + 6} H_{N + 6} S_{N + 7} H_{N + 7} S_{N + 8} H_{N + 8}
INPUT
S/H
1ST
STAGE
2ND
STAGE
B₁, _{N - 1}
B₁, _N
B₁, _{N + 1}
B₂, _{N - 2}
B₂, _{N - 1}
B₂, _N
B₁, _{N + 4}
B₁, _{N + 5}
B₁, _{N + 6}
B₁, _{N + 7}
B₂, _{N + 4}
B₂, _{N + 5}
B₂, _{N + 6}
9TH
STAGE
B₉, _{N - 5}
B₉, _{N - 4}
B₉, _N
B₉, _{N + 1}
B₉, _{N + 2}
B₉, _{N + 3}
DATA
OUTPUT
D_{N - 6}
D_{N - 5}
D_{N - 1}
D_N
t_LAT
NOTES:
4. S_N: N-th sampling period.
5. H_N: N-th holding period.
6. B_M, _N: M-th stage digital output corresponding to N-th sampled input.
7. D_N: Final data output corresponding to N-th sampled input.
FIGURE 1. ISL5740 INTERNAL CIRCUIT TIMING
D_{N + 1}
D_{N + 2}
ANALOG
INPUT
CLOCK
INPUT
1.5V
DATA
OUTPUT
DATA N-1
t_AP
t_AJ
1.5V
t_OD
t_H
2.4V
0.5V
DATA N
FIGURE 2. ISL5740 INPUT TO OUTPUT TIMING
3-8