ISL5740 Datasheet, PDF (1/12 Pages) Intersil Corporation – 3V Dual 10-Bit, 20/40/60MSPS A/D Converter with Internal Voltage Reference

TM
PRELIMINARY
Data Sheet
ISL5740
June 2000 File Number 4821.2
3V Dual 10-Bit, 20/40/60MSPS A/D
Converter with Internal Voltage Reference
The ISL5740 is a monolithic, dual 10-bit analog-to-digital
converter fabricated in an advanced CMOS process. It is
designed for high speed applications where integration,
bandwidth and accuracy are essential. The ISL5740
features a 9-stage pipeline architecture. The fully pipelined
architecture and an innovative input stage enable the
ISL5740 to accept a variety of input configurations, single-
ended or fully differential. Only one external clock is
necessary to drive both converters and an internal band-gap
voltage reference is provided. This allows the system
designer to realize an increased level of system integration
resulting in decreased cost and power dissipation.
The ISL5740 has excellent dynamic performance while
consuming less than 280mW power at 60MSPS. The A/D
only requires a single +3.0V power supply. Data output
latches are provided which present valid data to the output
bus with a latency of 5 clock cycles.
The ISL5740 is offered in 20MSPS, 40MSPS and 60MSPS
sampling rates.
Ordering Information
PART
NUMBER
ISL5740/2IN
TEMP.
RANGE
(^oC)
PACKAGE
SAMPLIN
G RATE
PKG. NO. (MSPS)
-40 to 85 48 Ld LQFP Q48.7x7
20
ISL5740/3IN -40 to 85 48 Ld LQFP Q48.7x7
30
ISL5740/4IN -40 to 85 48 Ld LQFP Q48.7x7
40
ISL5740/6IN -40 to 85 48 Ld LQFP Q48.7x7
60
ISL5740 EVAL 25 Evaluation Platform
Features
• Sampling Rate . . . . . . . . . . . . . . . . . . . . . .20/40/60MSPS
• 9.1 Bits at f_IN = 10MHz
• Low Power at 60MSPS. . . . . . . . . . . . . . . . . . . . . .280mW
• Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6mW
• Wide Full Power Input Bandwidth. . . . . . . . . . . . . 400MHz
• SFDR at f_IN = 10MHz . . . . . . . . . . . . . . . . . . . . . . . . .70dB
• Excellent Channel-to-Channel Isolation . . . . . . . . . . .75dB
• On-Chip Sample and Hold Amplifiers
• Internal Bandgap Voltage Reference . . . . . . . . . . . . 1.25V
• Single Supply Voltage Operation . . . . . . . . . .+2.7V - 3.6V
• TTL/CMOS(3V) Digital Inputs CMOS Digital Outputs
• Offset Binary or Two’s Complement Digital Data Output
Format
• Dual 10-Bit A/D Converters on a Monolithic Chip
• Pin Compatible Upgrade to AD9288
Pinout
• Wireless Local Loop
• PSK and QAM I&Q Demodulators
• Medical Imaging and Instrumentation
• Wireless Communications Systems
• Battery Powered Instruments
Pinout
GND
I_IN+
I_IN-
DFS
IV_RIN
V_ROUT
QV_RIN
S1
S2
Q_IN-
Q_IN+
GND
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
31
7
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
ID1
ID0
GND
DV_CC
GND
AV_CC
AV_CC
GND
DV_CC
GND
QD0
QD1
3-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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