ISL43410 Datasheet, PDF (8/13 Pages) Intersil Corporation – Low-Voltage, Single Supply, DPDT High Low-Voltage, Single Supply, DPDT High

ISL43410
Test Circuits and Waveforms (Continued)
V+
C
SIGNAL
GENERATOR
NO OR NC
ANALYZER
R_L
ADD
0V OR V+
COM
GND
0V OR V+
INH
r_ON = V₁/1mA
NO OR NC
V_NX
1mA
V₁
V+
C
0V OR V+
ADD
COM
GND INH
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
FIGURE 5. r_ON TEST CIRCUIT
SIGNAL
GENERATOR
V+
C
50Ω
NO1 OR NC1 _COM1
ADD
0V OR V+
NO2 OR NC2
NC
ANALYZER
COM2
GND INH
R_L
FIGURE 6. CROSSTALK TEST CIRCUIT
Detailed Descriptions
The ISL43410 operates from a single 2V to 12V supply with
low ON-resistance (115Ω) and high speed operation
(t_ON = 60ns, t_OFF = 30ns). The ISL43410 is especially well
suited to portable battery powered equipment thanks to the
low operating supply voltage (2.0V), low power consumption
(3µW), low leakage currents (5nA max), and the tiny MSOP
and QFN packaging. High frequency applications also benefit
from the wide bandwidth, and the very high OFF-isolation
(75dB) and crosstalk rejection (-85dB).
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents,
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and input signal
8
IMPEDANCE
ANALYZER
V+
C
NO OR NC
0V OR V+
ADD
COM
GND INH
FIGURE 7. CAPACITANCE TEST CIRCUIT
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not applicable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low r_ON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
FN6044.4
May 12, 2008