ISL22429 Datasheet, PDF (8/13 Pages) Intersil Corporation – Low Noise, Low Power, SPI Bus, 128 Taps, Wiper Only

ISL22449
Typical Performance Curves (Continued)
1.0
0.5
0.0 _{VCC = 5.5V}
-0.5
V_CC = 2.7V
50k
10k
-1.0
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (ºC)
FIGURE 7. END TO END R_TOTAL % CHANGE vs
TEMPERATURE
105
90
75
60
45
30 50k
10k
15
0
16
36
56
76
96
TAP POSITION (DECIMAL)
FIGURE 8. TC FOR VOLTAGE DIVIDER MODE IN ppm
SCL
SIGNAL AT WIPER
(WIPER UNLOADED)
SIGNAL AT WIPER
(WIPER UNLOADED MOVEMENT
FROM 7Fh TO 00h)
FIGURE 9. MIDSCALE GLITCH, CODE 80h TO 7Fh
Pin Description
Potentiometers Pins
RWI (I = 0, 1, 2, 3)
RWi is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WRi register.
SHDN
The SHDN pin forces the resistors to end-to-end open circuit
condition and shorts all RWs to GND. When SHDN is
returned to logic high, the previous latch settings put RWi at
the same resistance setting prior to shutdown. This pin is
logically ANDed with the SHDN bit in the ACR register. SPI
interface is still available in shutdown mode and all registers
are accessible. This pin must remain HIGH for normal
operation.
8
FIGURE 10. LARGE SIGNAL SETTLING TIME
RW
FIGURE 11. DCP CONNECTION IN SHUTDOWN MODE
Bus Interface Pins
SERIAL CLOCK (SCK)
This is the serial clock input of the SPI serial interface.
SERIAL DATA OUTPUT (SDO)
The SDO is an open drain serial data output pin. During a
read cycle, the data bits are shifted out at the falling edge of
the serial clock SCK, while the CS input is low.
SDO requires an external pull-up resistor for proper operation.
FN6333.3
July 17, 2009