ISL22326_15 Datasheet, PDF (8/17 Pages) Intersil Corporation – Low Noise, Low Power, I2C™ Bus, 128 Taps

SDA vs SCL Timing
SCL
t_SU:STA
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
ISL22326
t_F
t_HIGH
t_SU:DAT
t_HD:STA
t_LOW
t_HD:DAT
t_R
t_sp
t_AA t_DH
t_HD:STO
t_SU:STO
t_BUF
A0, A1, and A2 Pin Timing
SCL
START
CLK 1
SDA
A0, A1, OR A2
t_SU:A
[
Typical Performance Curves
100
90 ^{VCC = 3.3V, T = +125°C}
80
70
60
50
40
30
20 ^VCC ^{= 3.3V, T = +20°C}
V_CC = 3.3V, T = -40°C
10
0
0
20
40
60
80
100
120
TAP POSITION (DECIMAL)
FIGURE 1. WIPER RESISTANCE vs TAP POSITION
[ I(RW) = V_CC/R_TOTAL ] FOR 10k (W)
STOP
t_HD:A
1.4
1.2
1.0
0.8
T = +125°C
0.6
0.4
T = +25°C
0.2
0
2.7
3.2
3.7
4.2
4.7
5.2
V_CC (V)
FIGURE 2. STANDBY I_CC vs V_CC
8
FN6176.3
September 9, 2015