ISL22326_15 Datasheet, PDF (1/17 Pages) Intersil Corporation – Low Noise, Low Power, I2C™ Bus, 128 Taps

Data Sheet
ISL22326
Dual Digitally Controlled Potentiometers (XDCP™)
September 9, 2015
FN6176.3
Low Noise, Low Power, I²C^™ Bus, 128 Taps
The ISL22326 integrates two digitally controlled potentiometers
(XDCP) and non-volatile memory on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I²C bus interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the two
DCP’s IVR to the corresponding WRs.
The DCPs can be used as three-terminal potentiometers or
as two-terminal variable resistors in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Pinouts
V_CC
SHDN
RH0
RL0
RW0
A2
SCL
ISL22326
(14 LD TSSOP)
TOP VIEW
1
14
2
13
3
12
4
11
5
10
6
9
7
8
A1
A0
RH1
RL1
RW1
GND
SDA
Features
• Two potentiometers in one package
• 128 resistor taps
• I²C serial interface
- Three address pins, up to eight devices/bus
• Non-volatile storage of wiper position
• Wiper resistance: 70 typical @ V_CC = 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kor 10k total resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T < +55°C
• 14 Ld TSSOP or 16 Ld QFN package
• Pb-free (RoHS compliant)
ISL22326
(16 LD QFN)
TOP VIEW
16 15 14 13
RH0 1
12 RH1
RL0 2
11 RL1
RW0 ³
10 RW1
NC ⁴
9 NC
5678
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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