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HD6409_15 Datasheet, PDF (8/15 Pages) Intersil Corporation – CMOS Manchester Encoder-Decoder
HD-6409
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.5V to VCC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Voltage Range. . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times . . . . . . . . . . . . . . . . . . . . . . . . . 50ns Max
Sync. Transition Span (t2) . . . . . . . . . .1.5 DBP Typical, (Notes 1, 2)
Short Data Transition Span (t4) . . . . . . 0.5DBP Typical, (Notes 1, 2)
Long Data Transition Span (t5) . . . . . . 1.0DBP Typical, (Notes 1, 2)
Zero Crossing Tolerance (tCD5) . . . . . . . . . . . . . . . . . . . . . (Note 3)
Thermal Information
Thermal Resistance (Typical, Note 4)
JA (°C/W) JC (°C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
75
N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 100
N/A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Maximum Junction Temperature
Ceramic Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250 Gates
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. DBP-Data Bit Period, Clock Rate = 16X, one DBP = 16 Clock Cycles; Clock Rate = 32X, one DBP = 32 Clock Cycles.
2. The input conditions specified are nominal values, the actual input waveforms transition spans may vary by 2 IX clock cycles (16X mode) or 6
IX clock cycles (32X mode).
3. The maximum zero crossing tolerance is 2 IX clock cycles (16X mode) or 6 IX clock cycles (32 mode) from the nominal.
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Common Electrical Specifications
Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
DC Electrical Specifications VCC = 5.0V10%, TA = -40°C to +85°C (HD-6409-9).
SYMBOL
PARAMETER
TEST CONDITIONS
(Note 5)
MIN
MAX
UNITS
VIH
VIL
VIHR
VILR
VIHC
VILC
II
II
IO
VOH
VOL
ICCSB
Logical “1” Input Voltage
Logical “0” Input Voltage
Logic “1” Input Voltage (Reset)
Logic “0” Input Voltage (Reset)
Logical “1” Input Voltage (Clock)
Logical “0” Input Voltage (Clock)
Input Leakage Current (Except IX)
Input Leakage Current (IX)
I/O Leakage Current
Output HIGH Voltage (All Except OX)
Output LOW Voltage (All Except OX)
Standby Power Supply Current
VCC = 4.5V
VCC = 4.5V
VCC = 5.5V
VCC = 4.5V
VCC = 5.5V
VCC = 4.5V
VIN = VCC or GND, VCC = 5.5V
VIN = VCC or GND, VCC = 5.5V
VOUT = VCC or GND, VCC = 5.5V
IOH = -2.0mA, VCC = 4.5V (Note 6)
IOL = +2.0mA, VCC = 4.5V (Note 6)
VIN = VCC or GND, VCC = 5.5V,
Outputs Open
70% VCC
-
V
-
20% VCC
V
VCC -0.5
-
V
-
GND +0.5
V
VCC -0.5
-
V
-
GND +0.5
V
-1.0
+1.0
A
-20
+20
A
-10
+10
A
VCC -0.4
-
V
-
0.4
V
-
100
A
ICCOP
Operating Power Supply Current
f = 16.0MHz, VIN = VCC or GND
VCC = 5.5V, CL = 50pF
-
18.0
mA
FT
Functional Test
(Note 5)
-
-
-
NOTES:
5. Tested as follows: f = 16MHz, VIH = 70% VCC, VIL = 20% VCC, VOH  VCC/2, and VOL VCC/2, VCC = 4.5V and 5.5V.
6. Interchanging of force and sense conditions is permitted
8
FN2951.4
October 1, 2015