 English |
|
|
|
|
|
|
|
| HD6409_15 Datasheet, PDF (12/15 Pages) Intersil Corporation – CMOS Manchester Encoder-Decoder | |||
| |||
| ◁ |
Timing Waveforms (Continued)
HD-6409
UDI
ECLK
BZO
SDO
NVM
MANCHESTER â1â
MANCHESTER â0â
MANCHESTER â0â
MANCHESTER â1â
tR2
tR2
tR1
MANCHESTER â1â
tR3
MANCHESTER â0â
MANCHESTER â0â
tR3
FIGURE 17. REPEATER TIMING
Test Load Circuit
DUT
CL
(NOTE)
NOTE: INCLUDES STRAY AND JIG
CAPACITANCE
FIGURE 18. TEST LOAD CIRCUIT
12
FN2951.4
October 1, 2015
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese