HD-6409_05 Datasheet, PDF (8/12 Pages) Intersil Corporation – CMOS Manchester Encoder-Decoder

HD-6409
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.5V to V_CC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance (Typical)
θ_JA
θ_JC
PDIP Package . . . . . . . . . . . . . . . . . . . . . 75°C/W
N/A
SOIC Package. . . . . . . . . . . . . . . . . . . . . 100°C/W N/A
Storage Temperature Range . . . . . . . . . . . . . . . . . -65°C to +150°C
Maximum Junction Temperature
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Plastic Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . +300°C
( Lead Tips Only for Surface Mount Packages)
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times . . . . . . . . . . . . . . . . . . . . . . . . . 50ns Max
Sync. Transition Span (t2) . . . . . . . . . 1.5 DBP Typical, (Notes 1, 2)
Short Data Transition Span (t4) . . . . . 0.5DBP Typical, (Notes 1, 2)
Long Data Transition Span (t5). . . . . . 1.0DBP Typical, (Notes 1, 2)
Zero Crossing Tolerance (tCD5). . . . . . . . . . . . . . . . . . . . . . (Note 3)
NOTES:
1. DBP-Data Bit Period, Clock Rate = 16X, one DBP = 16 Clock Cycles; Clock Rate = 32X, one DBP = 32 Clock Cycles.
2. The input conditions specified are nominal values, the actual input waveforms transition spans may vary by ±2 I_X clock cycles (16X mode) or ±6
I_X clock cycles (32X mode).
3. The maximum zero crossing tolerance is ±2 I_X clock cycles (16X mode) or ±6 I_X clock cycles (32 mode) from the nominal.
DC Electrical Specifications V_CC = 5.0V ± 10%, T_A = -40°C to +85°C (HD-6409-9)
SYMBOL
PARAMETER
MIN
MAX
UNITS
(NOTE 1) TEST CONDITIONS
V_IH
V_IL
V_IHR
V_ILR
V_IHC
V_ILC
I_I
I_I
I_O
V_OH
V_OL
I_CCSB
Logical “1” Input Voltage
Logical “0” Input Voltage
Logic “1” Input Voltage (Reset)
Logic “0” Input Voltage (Reset)
Logical “1” Input Voltage (Clock)
Logical “0” Input Voltage (Clock)
Input Leakage Current (Except I_X)
Input Leakage Current (I_X)
I/O Leakage Current
Output HIGH Voltage (All Except O_X)
Output LOW Voltage (All Except O_X)
Standby Power Supply Current
70% V_CC
-
V_CC -0.5
-
V_CC -0.5
-
-1.0
-20
-10
V_CC -0.4
-
-
-
20% V_CC
-
GND +0.5
-
GND +0.5
+1.0
+20
+10
-
0.4
100
V
V_CC = 4.5V
V
V_CC = 4.5V
V
V_CC = 5.5V
V
V_CC = 4.5V
V
V_CC = 5.5V
V
V_CC = 4.5V
µA
V_IN = V_CC or GND, V_CC = 5.5V
µA
V_IN = V_CC or GND, V_CC = 5.5V
µA
V_OUT = V_CC or GND, V_CC = 5.5V
V
I_OH = -2.0mA, V_CC = 4.5V (Note 2)
V
I_OL = +2.0mA, V_CC = 4.5V (Note 2)
µA
V_IN = V_CC or GND, V_CC = 5.5V,
Outputs Open
I_CCOP
Operating Power Supply Current
-
18.0
mA
f = 16.0MHz, V_IN = V_CC or GND
V_CC = 5.5V, C_L = 50pF
F_T
Functional Test
-
-
-
(Note 1)
NOTES:
1. Tested as follows: f = 16MHz, V_IH = 70% V_CC, V_IL = 20% V_CC, V_OH ≥ V_CC/2, and V_OL ≤ V_CC/2, V_CC = 4.5V and 5.5V.
2. Interchanging of force and sense conditions is permitted
8
FN2951.2
July 29, 2005