HC55171B Datasheet, PDF (8/11 Pages) Intersil Corporation – Low Cost 5 REN Ringing SLIC for ISDN Modem/TA and WL

HC55171B
When the SLIC is matched to a 600Ω load and only the sense
resistors are used, the 4-wire to 4-wire gain is equal to 5/12 as
predicted by the design equations. Therefore, by configuring
the transhybrid amplifier with a gain of 2.4 in the echo path,
cancellation can be achieved. The following equations:
V_O
=

– _ V _R
X



R^-R----_AF^--_{}
+
V_O
U
T1



R^-R----_BF^--_{}



Substituting the fact that V_OUT1 is -5/12 of V_RX:
(EQ. 2)
V_O
=

– _ V _R
X



R^-R----_AF^--_{}
–
V_R
X


–_
1^--5--2^{-- }



R^-R----_BF^--_{}



(EQ. 3)
Since cancellation implies that under these conditions, the
output V_O should be zero, set Equation 2 equal to zero and
solve for R_B.
R_B = ₂-^R---_.-^A-₄-
(EQ. 4)
Another outcome of the transhybrid gain selection is the
2-wire to 4-wire gain of the SLIC as seen by the CODEC.
The 5/12 voltage gain in the transmit path is relevant to the
receive input as well as any signals from the 2-wire side.
Therefore by setting the V_OUT1 gain to 2.4 in the previous
analysis, the 2-wire to 4-wire gain was set to unity.
Single Supply CODEC Interface
The majority of CODECs that interface to the ringing SLIC
operate from a single +5V supply and ground. Figure 4
shows the circuitry required to properly interface the ringing
SLIC to the single supply CODEC.
V_RX
V_OUT1
HC5517B
R_A
R_F
R_B
CODEC
RX OUT
-
+
TX IN
+2.5V ⁺_-
The CODEC signal names may vary from different
manufacturers, but the function provided will be the same.
The DC reference from the CODEC is used to bias the ana-
log signals between +5V and ground. The capacitors are
required so that the DC gain is unity for proper biasing from
the CODEC reference. Also, the capacitors block DC signals
that may interfere with SLIC or CODEC operation.
Layout Guidelines and Considerations
The printed circuit board trace length to all high impedance
nodes should be kept as short as possible. Minimizing length
will reduce the risk of noise or other unwanted signal pickup.
The short lead length also applies to all high gain inputs. The
set of circuit nodes that can be categorized as such are:
• V_RX pin 27, the 4-wire voice input (low gain input).
• -IN1 pin 13, the inverting input of the internal amplifier.
• V_REF pin 3, the noninverting input to ring feed amplifier.
• V_RING pin 24, the 20V/V input for the ringing signal.
For multi layer boards, the traces connected to tip should not
cross the traces connected to ring. Since they will be carry-
ing high voltages, and could be subject to lightning or surge
depending on the application, using a larger than minimum
trace width is advised.
The 4-wire transmit and receive signal paths should not
cross. The receive path is any trace associated with the V_RX
input and the transmit path is any trace associated with V_TX
output. The physical distance between the two signal paths
should be maximized to reduce crosstalk, or separated by a
ground trace.
The operating mode control signals and detector outputs
should be routed away from the analog circuitry. Though
the digital signals are nearly static, care should be taken to
minimize coupling of the sharp digital edges to the analog
signals.
The part has two ground pins, one is labeled AGND and the
other BGND. Both pins should be connected together as
close as possible to the SLIC. If a ground plane is available,
then both AGND and BGND should be connected directly to
the ground plane.
A ground plane that provides a low impedance return path
for the supply currents should be used. A ground plane
provides isolation between analog and digital signals. If the
layout density does not accommodate a ground plane, a
single point grounding scheme should be used.
FIGURE 4. SINGLE SUPPLY CODEC INTERFACE
70