HC55171B Datasheet, PDF (6/11 Pages) Intersil Corporation – Low Cost 5 REN Ringing SLIC for ISDN Modem/TA and WL

HC55171B
Circuit Operation and Design Information
SLIC DESIGN EQUATIONS
FUNCTION
2-Wire to 4-Wire Gain
4-Wire To 2-wire Gain
4-Wire To 4-wire Gain
Loop Current Limit Programming
EQUATION
DEFINITION OF TERMS
V_{----V-O---2-U---W-T----1- = –Z-2---02----0w-- â‹} R_{-R----ZR----OF--}
V_OUT1 = SLIC 4-wire Output
V_2w = Voltage across 2-wire load
Z_2W = 2-Wire Impedance
V_{-V----2R---W-X--}
=
–2
⋅



Z^----₂^----_W^{----Z--+--2---}Z^W----_S^----_L^---_I^--_C^--_{}
V_2W = Voltage Across 2-Wire Load
V_RX = SLIC 4-Wire Input
Z_2W = 2-Wire Impedance
Z_SLIC = SLIC Synthesized Impedance
V_{-----O----U----T----1-}
V_RX
=
–2
⋅



-_Z---₂----_W----^Z--+--²---_Z^W----_S----_L---_I--_C--_{}
⋅ _Z--²--₂-⁰---_W⁰--- ⋅ -^RR----^ZR----^OF--
V_OUT1 = SLIC 4-Wire Output
V_RX = SLIC 4-Wire Input
Z_2W = 2-Wire Impedance
Z_SLIC = SLIC Synthesized Impedance
I_LIMIT = ⁽---⁰---^.--⁶--₍--⁾₂--⁽--₀-^R--₀--^I--_x^L---_R¹-----+_I--_L---^R₂---₎-^I--^L----²---⁾
I_LIMIT = Programmed Loop Current Limit
R_IL1 = Programming Resistor
R_IL2 = Programming Resistor
Impedance Matching
R_ZO = K ⋅ (Z_2W – 100)
R_RF = K ⋅ 200 ⋅ 2
Z_2W = 2-Wire Impedance
K = 100
Through SLIC Ringing
The HC55171B uses linear amplification to produce the
ringing signal. As a result the ringing SLIC can produce sinu-
soid, trapezoid or square wave ringing signals. Regardless of
the wave shape, the ringing signal is balanced. The balanced
waveform is another way of saying that the tip and ring DC
potentials are the same during ringing.
Trapezoidal Ringing
The trapezoidal ringing waveform provides a larger RMS
voltage to the handset. Larger RMS voltages to the handset
provide more power for ringing and also increase the loop
length supported by the ringing SLIC.
One set of component values will satisfy the entire ringing
loop range of the SLIC. A single resistor sets the open circuit
RMS ringing voltage, which will set the crest factor of the
ringing waveform. The crest factor of the HC55171B ringing
waveform is independent of the ringing load (REN) and the
loop length. Another robust feature of the HC55171B ringing
SLIC is the ring trip detector circuit. The suggested values for
the ring trip detector circuit cover quite a large range of
applications.
The assumptions used to design the trapezoidal ringing
application circuit are listed below:
• Loop current limit set to 25mA.
• Impedance matching is set to 600Ω resistive.
• 2-wire surge protection is not required.
• System able to monitor RTD and SHD.
Logic ringing signal is used to drive RC trapezoid network.
Crest Factor Programming
As previously mentioned, a single resistor is required to set
the crest factor of the trapezoidal waveform. The only design
variable in determining the crest factor is the battery voltage.
The battery voltage limits the peak signal swing and
therefore directly determines the crest factor.
A set of tables will be provided to allow selection of the crest
factor setting resistor. The tables will include crest factors
below the Bellcore minimum of 1.2 since many ringing SLIC
applications are not constrained by Bellcore requirements.
TABLE 1. CREST FACTOR PROGRAMMING RESISTOR FOR
V_BAT = -80V
R_TRAP
CF
RMS R_TRAP
CF
RMS
0Ω
1.10
65.0
825Ω
1.25
57.6
389Ω
1.15
62.6
964Ω
1.30
55.4
640Ω
1.20
60.0
1095Ω
1.35
53.3
The RMS voltage listed in the table is the open circuit RMS
voltage generated by the SLIC.
TABLE 2. CREST FACTOR PROGRAMMING RESISTOR FOR
V_BAT = -75V
R_TRAP
CF
RMS R_TRAP
CF
RMS
0Ω
1.10
60.9
1010Ω
1.25
53.7
500Ω
1.15
58.3
1190Ω
1.30
51.6
791Ω
1.20
55.9
1334Ω
1.35
49.7
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