CD4089BMS Datasheet, PDF (8/10 Pages) Intersil Corporation – CMOS Binary Rate Multiplier

CD4089BMS
TRUTH TABLE
INPUTS
OUTPUTS
NUMBER OF PULSES OR INPUT LOGIC LEVEL
(0 = Low; 1 = High; X = Don’t Care)
NUMBER OF PULSES OR OUTPUT LOGIC LEVEL
(L = Low; H = High)
D C B A CLK INH IN STR CAS CLR SET
OUT
OUT
INH OUT “15” OUT
0000
16
0
0
0
0
0
L
H
1
1
0001
16
0
0
0
0
0
1
1
1
1
0010
16
0
0
0
0
0
2
2
1
1
0011
16
0
0
0
0
0
3
3
1
1
0100
16
0
0
0
0
0
4
4
1
1
0101
16
0
0
0
0
0
5
5
1
1
0110
16
0
0
0
0
0
6
6
1
1
0111
16
0
0
0
0
0
7
7
1
1
1000
16
0
0
0
0
0
8
8
1
1
1001
16
0
0
0
0
0
9
9
1
1
1010
16
0
0
0
0
0
10
10
1
1
1011
16
0
0
0
0
0
11
11
1
1
1100
16
0
0
0
0
0
12
12
1
1
1101
16
0
0
0
0
0
13
13
1
1
1110
16
0
0
0
0
0
14
14
1
1
1111
16
0
0
0
0
0
15
15
1
1
XXXX
16
1
0
0
0
0
**
**
H
**
XXXX
16
0
1
0
0
0
L
H
1
1
XXXX
16
0
0
1
0
0
H
*
1
1
1XXX
16
0
0
0
1
0
16
16
H
L
0XXX
16
0
0
0
1
0
L
H
H
L
XXXX
16
0
0
0
X
1
L
H
L
H
* Output same as the first 16 lines of this truth table (depending on values A, B, C, D)
** Depends on internal state of counter
MOST SIGNIFICANT
DIGIT
1
A
1B
OUT
DRM 1
0C
OUT
1D
CLOCK ^{INH OUT}
CASC
INH IN
“15”
ST
CLEAR
S
LEAST SIGNIFICANT
DIGIT
1
A
0B
OUT
DRM 2
1C
OUT
1D
CLOCK ^{INH OUT}
CASC
INH IN
“15”
ST
CLEAR
S
MOST SIGNIFICANT
DIGIT
1
A
1B
OUT
DRM 1
0C
OUT
1D
CLOCK ^{INH OUT}
CASC
INH IN
“15”
ST
CLEAR
S
LEAST SIGNIFICANT
DIGIT
1
A
0B
OUT
DRM 2
1C
OUT
1D
CLOCK ^{INH OUT}
CASC
INH IN
“15”
ST
CLEAR
S
CLOCK
CLOCK
FIGURE 2. TWO CD4089BMS’s CASCADED IN THE “ADD”
MODE WITH A PRESET NUMBER
OF 189
11
16
+
13
256
=
189
256
FIGURE 3. TWO CD4089BMS’s CASCADED IN THE “MULTI-
PLY” MODE WITH A PRESET NUMBER
OF 143
11
16
+
13
16
=
143
256
7-1071