X9258_13 Datasheet, PDF (7/19 Pages) Intersil Corporation – Low Noise/Low Power/2-Wire Bus/256 Taps

X9258
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 P1 P0 A D7 D6 D5 D4 D3 D2 D1 D0 A S
T
C
C
CT
A
K
K
KO
R
P
T
FIGURE 4. THREE-BYTE INSTRUCTION SEQUENCE
I
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 P1 P0 A I I
T
C
CNN
A
K
KCC
R
12
T
FIGURE 5. INCREMENT/DECREMENT INSTRUCTION SEQUENCE
F
I
INC/DEC
CMD
ISSUED
SCL
t_WRID
ID
NE
CC
n1
DS
ET
CO
nP
SD A
V_W/R_W
VOLTAGE OUT
FIGURE 6. INCREMENT/DECREMENT TIMING LIMITS
SCL FROM
MASTER
1
DATA OUTPUT
FROM TRANSMITTER
8
9
DATA OUTPUT
FROM RECEIVER
START
FIGURE 7. ACKNOWLEDGE RESPONSE FROM RECEIVER
ACKNOWLEDGE
7
FN8168.6
December 15, 2011