ISL24011 Datasheet, PDF (7/9 Pages) Intersil Corporation – High Voltage TFT-LCD Logic Driver

ISL24011
Typical Performance Curves T_A = 25°C, Output load parallel RC (RL = 5kΩ, CL = 4700pF) unless otherwise specified. (Continued)
0
1800pF
PULSE INPUT
4700pF
0
V_ON1 & V_ON2 = 22V
V_OFF = -5V
50kHz 10% DUTY CYCLE
400ns/DIV
FIGURE 13. TRANSIENT RESPONSE vs LOAD CAPACITANCE
Application Information
General
The ISL24011 is an octal voltage level shifter. The part was
designed to level shift a digital input signal to +22V and -5V
for TFT-LCD displays and is capable of level shifting input
logic signals (0V to 5.5V) to outputs as large as +40V and
-20V.
Power Supply Decoupling
The ISL24011 requires a 1.0µF decoupling capacitor as
close to the V_ON1, V_ON2 and V_OFF power supply pins, as
possible, for a large load equal to 5kΩ in parallel with
4700pF (Figure 16). This will reduce any dv/dt between the
different supplies and prevent the internal ESD clamp from
turning on and damaging the part.
For lighter loads such as a series 200Ω resistor and a
3300pF capacitance, the decoupling capacitors can be
reduced to 0.47µF.
Power Supply Sequence
The ISL24011 requires that V_ON2 be greater than or equal to
V_ON1 at all times. Therefore, if V_ON1 and V_ON2 are different
supplies, then V_ON2 needs to be turned on before V_ON1.
The reason for this requirement is shown in Circuit 4 in the
Pin Description Table. The ESD protection diode between
V_ON2 and V_ON1 will forward bias if V_ON1 becomes a diode
drop greater than V_ON2. Recommended power supply
sequence: V_ON2, V_ON1, V_OFF, then input logic signals.
The ESD protection scheme is based on diodes from the
pins to the V_ON2 supply and a dv/dt-triggered clamp. This
dv/dt-triggered clamp imposes a maximum supply turn-on
slew rate of 10V/µs. This clamp will trigger if the supply
powers up too fast, causing amps of current to flow. Ground
and V_ON1 are treated as I/O pins with this protection
scheme. In applications where the dv/dt supply ramp could
exceed 10V/µs, such as hot plugging, additional methods
should be employed to ensure the rate of rise is not
exceeded.
Latch-up Proof
The ISL24011 is manufactured in a high voltage DI process
that isolates every transistor in its own tub making the part
latch-up proof.
Input Pin Connections
Unused inputs must be tied to ground. Failure to tie unused
input pins to ground will result in rail to rail oscillations on the
respective output pins and higher unwanted power
dissipation in the part. Under these conditions, the
temperature of the part could get very hot.
Limiting the Output Current
No output short circuit current limit exists on this part. All
applications need to limit the output current to less than
80mA. Adequate thermal heat sinking of the parts is also
required.
Application Diagram (TV)
1.0µF
1.0µF
DC/DC
CONVERTER
V_ON1
V_OFF
V_ON2
1.0µF
TIMING
CONTROLLER
ISL24011
LEVEL
SHIFTER
LCD PANEL
FIGURE 14. TYPICAL TV APPLICATION CIRCUIT
7
FN6196.0
October 21, 2005