X3100 Datasheet, PDF (6/40 Pages) Xicor Inc. – 3 or 4 Cell Li-Ion Battery Protection and Monitor IC

X3100, X3101
The capacitors on the V_CELL1 to V_CELL4 inputs are
used in a first order low pass filter configuration, at the
battery cell voltage monitoring inputs (VCELL1 -
VCELL4) of the X3100 or X3101. This filter is used to
block any unwanted interference signals from being
inadvertently injected into the monitor inputs. These
interference signals may result from:
– Transients created at battery contacts when the bat-
tery pack is being connected/disconnected from the
charger or the host.
– Electrostatic discharge (ESD) from some-
thing/someone touching the battery contacts.
– Unfiltered noise that exists in the host device.
– RF signals which are induced into the battery pack
from the surrounding environment.
Such interference can cause the X3100 or X3101 to
operate in an unpredictable manner, or in extreme
cases, damage the device. As a guide, the capacitor
should be in the order of 0.01µF and the resistor,
should be in the order of 10kΩ. The capacitors should
be of the ceramic type. In order to minimize interfer-
ence, PCB tracks should be made as short and as
wide as possible to reduce their impedance. The bat-
tery cells should also be placed as close to the X3100 or
X3101 monitor inputs as possible.
Resistors R_CB and the associated n-channel MOSFET’s
(Q₆ - Q₉) are used for battery cell voltage balancing.
The X3100 and X3101 provide internal drive circuitry
which allows the user to switch FETs Q₆ - Q₉ ON or
OFF via the microcontroller and SPI port (see section
“Cell Voltage Balance Control (CBC1-CBC4)” on page
12). When any of the these FETs are switched ON, a
current, limited by resistor R_CB, flows across the par-
ticular battery cell. In doing so, the user can control the
voltage across each individual battery cell. This is
important when using Li-Ion battery cells since imbal-
ances in cell voltages can, in time, greatly reduce the
usable capacity of the battery pack. Cell voltage bal-
ancing may be implemented in various ways, but is
usually performed towards the end of cell charging
(“Top-of-charge method”). Values for R_CB will vary
according to the specific application.
The internal 4kbit EEPROM memory can be used to
store the cell characteristics for implementing such
functions as gas gauging, battery pack history,
charge/discharge cycles, and minimum/maximum con-
ditions. Battery pack manufacturing data as well as
serial number information can also be stored in the
EEPROM array. An SPI serial bus provides the com-
munication link to the EEPROM.
A current sense resistor (R_SENSE) is used to measure
and monitor the current flowing into/out of the battery
terminals, and is used to protect the pack from over-
current conditions (see section “Over-Current Protec-
tion” on page 19). R_SENSE is also used to externally
monitor current via a microcontroller (see section “Cur-
rent Monitor Function” on page 21).
FETs Q4 and Q5 may be required on general pur-
pose I/Os of the microcontroller that connect outside
of the package. In some cases, without FETs, pull-up
resistors external to the pack force a voltage on the
V_CC pin of the microcontroller during a pack sleep con-
dition. This voltage can affect the proper tuned voltage
of the X3100/X3101 regulator. These FETs should be
turned-on by the microcontroller. (See Figure 1.)
POWER-ON SEQUENCE
Initial connection of the Li-Ion cells in the battery pack
will not normally power-up the battery pack. Instead,
the X3100 or X3101 enters and remains in the SLEEP
mode. To exit the SLEEP mode, after the initial power-
up sequence, or following any other SLEEP MODE, a
minimum of 16V (X3100 V_SLR) or 12V (X3101 V_SLR) is
applied to the VCC pin, as would be the case during a
battery charge condition. (See Figure 2.)
When V_SLR is applied to VCC, the analog select pins
(AS2 - AS0) and the SPI communication pins (CS,
CLK, SI, SO) must be low, so the X3100 and X3101
power-up correctly into the normal operating mode.
This can be done by using a power-on reset circuit.
When entering the normal operating mode, either from
initial power-up or following the SLEEP MODE, all bits
in the control register are zero. With UVPC and OVPC
bits at zero, the charge and discharge FETs are off.
The microcontroller must turn these on to activate the
pack. The microcontroller would typically check the
voltage and current levels prior to turning on the FETs
via the SPI port. The software should prevent turning
on the FETs throughout an initial measurement/cali-
bration period. The duration of this period is
T_OV + 200ms or T_UV + 200ms, whichever is longer.
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FN8110.0
April 11, 2005