X3100 Datasheet, PDF (4/40 Pages) Xicor Inc. – 3 or 4 Cell Li-Ion Battery Protection and Monitor IC

X3100, X3101
PIN NAMES (Continued)
Pin Symbol
Brief Description
23 OVP/ Over-charge Voltage Protection output/Load Monitor output. This one pin performs two functions
LMON depending upon the present mode of operation of the X3100 or X3101.
Over-charge Voltage Protection (OVP)
This pin controls the switching of the battery pack charge FET. This power FET is a P-channel device. As
such, cell charge is possible when OVP/LMON=V_SS, and cell charge is prohibited when OVP/LMO = V_CC.
In this configuration the X3100 and X3101 turn off the charge voltage when the cells reach the over-charge
limit. This prevents damage to the battery cells due to the application of charging voltage for an extended
period of time (see section “Over-charge Protection” on page 14).
Load Monitor (LMON)
In Over-current Protection mode, a small test current (7.5µA typ.) is passed out of this pin to sense the
load resistance. The measured load resistance determines whether or not the X3100 or X3101 returns
from an over-current protection mode (see section “Over-Current Protection” on page 19).
24 UVP/ Over-discharge protection output/Over-current protection output. Pin UVP/OCP controls the bat-
OCP tery cell discharge via an external power FET. This P-channel FET allows cell discharge when
UVP/OCP=Vss, and prevents cell discharge when UVP/OCP=Vcc. The X3100 and X3101 turn the ex-
ternal power FET off when the X3100 or X3101 detects either:
Over-discharge Protection (UVP)
In this case, pin 24 is referred to as “Over-discharge (Under-Voltage) protection (UVP)” (see section
“Over-discharge Protection” on page 16). UVP/OCP turns off the FET to prevent damage to the battery
cells by being discharged to excessively low voltages.
Over-current protection (OCP)
In this case, pin 24 is referred to as “Over-current protection (OCP)” (see section “Over-Current Protec-
tion” on page 19). UVP/OCP turns off the FET to prevent damage to the battery pack caused by exces-
sive current drain (e.g. as in the case of a surge current resulting from a stalled disk drive).
25 RGO Voltage regulator output pin. This pin is an input that connects to the collector of an external PNP tran-
sistor. The voltage at this pin is the regulated output voltage, but it also provides the feedback voltage
for the regulator and the operating voltage for the device.
26 RGC Voltage regulator control pin. This pin connects to the base of an external PNP transistor and controls
the transistor turn on.
27 RGP Voltage regulator protection pin. This pin is an input that connects to the emitter of an external PNP
transistor and an external current limit resistor and provides a current limit voltage.
28 VCC Power supply. This pin is provides the voltage for FET control, regulator operation, and wake-up
circuits.
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FN8110.0
April 11, 2005