ISL5586 Datasheet, PDF (6/20 Pages) Intersil Corporation – Low Power Ringing SLIC for Home Gateways

ISL5586
Electrical Specifications
Unless Otherwise Specified, T_A = -40^oC to 85^oC, V_BL = -24V, V_BH = -100V, V_CC = +5V,
AGND = BGND = 0V, loop current limit = 25mA. All AC Parameters are specified at 600Ω,
2-wire terminating impedance over the frequency band of 300Hz to 3.4kHz. Protection
resistors = 0Ω. These parameters apply generically to each product offering. (Continued)
PARAMETER
V_BH to 4-Wire, BSEL = 2.0V
NOTES:
TEST CONDITIONS
f = 50Hz
f = 300Hz ≤ f ≤ 3400Hz
f = 8kHz ≤ f ≤ 16kHz
MIN TYP MAX UNITS
-
76
-
dB
-
55
-
dB
-
42
-
dB
2. These parameters are controlled via design and Statistical Process Control and are not directly tested. These parameters are characterized upon
initial design release and upon design changes which would affect these characteristics.
3. Input voltage = 0.636V_RMS for V_BH = -100V, 0.530V_RMS for V_BH = -85V and 0.460V_RMS for -75V devices.
4. Tested per IEEE455-1985, with 368Ω resistors connected to the Tip and Ring terminals.
5. These parameters are tested 100% at room temperature, and are guaranteed but not tested across the full temperature range via statistical
characterization and design.
6. The power dissipation is based on actual device measurements and will be less than worst case calculations based on data sheet supply current limits.
7. Characterized with 2 x 10us and 10 x 1000us first level lightning surge waveform (GR-1089-CORE).
Design Equations
Refer to Figure 14 for programming resistor connections.
Loop Supervision Thresholds
SWITCH HOOK DETECT
The desired switch hook detect threshold current (I_SH) is set by
a single external resistor, R_SH as follows
R_SH = 615 ⁄ I_SH
(EQ. 1)
The loop current threshold programming range is from 5mA
to 15mA.
RING TRIP DETECT
The ring trip detect threshold (I_RT) is set by a single external
resistor, R_RT as follows.
R_RT = 1800 ⁄ I_RT
(EQ. 2)
I_RT should be set between the peak ringing current and the
peak off hook current while still ringing. In addition, the ring
trip current must be set below the transient current limit
including tolerances. The ringing signal filter capacitor C_RT,
in parallel with R_RT sets the ring trip response time.
LOOP CURRENT LIMIT
The DC loop current limit (I_LIM) is programmed by the
external resistor R_IL as follows.
R_IL = ¹-_I--_L-⁷---_I⁶--_M--⁰-
(EQ. 3)
The loop current limit programming range is from 15mA to
45mA.
Impedance Matching
The AC source impedance of the SLIC is programmed with
the external impedance network Z_S as described next. To
synthesize and match Resistive line terminations the
programming network is simply a resistor (R_S) as shown in
Figure 14. For complex line terminations such as the one
illustrated in Figure 1, a complex programming network is
required.
RESISTIVE IMPEDANCE SYNTHESIS
The AC source resistance of the SLIC is synthesized with a
single external resistor R_S as follows:
R_S
=
Z₀
×


4_----03_---0_{--}
=
133.3 ( Z₀ )
(EQ. 4)
The synthesized resistance (Z₀) is determined by the
characteristic line resistance and protection resistors as
shown in Equation 5.
Z_O = R_L – (RP₁ + RP₂)
(EQ. 5)
COMPLEX IMPEDANCE SYNTHESIS
A complex network is used in place of R_S when the termination
impedance of the line is complex as shown in Figure 1.
2-WIRE TERMINATION
IMPEDANCE (Z_L)
C₂
R₁
R₂
PROGRAMMING
NETWORK (Z_S)
C_P
R_S
R_P
FIGURE 1. COMPLEX PROGRAMMING NETWORK
The component R_S has a different design equation than the
R_S used for resistive impedance synthesis. The design
equations for each component are provided below where
RP1 and RP2 are the protection resistors and R_P is a
component of the programming network.
R_S = 133.3 × (R1 – RP₁ – RP₂)
R_P = 133.3 × R₂
C_P = C₂ ⁄ 133.3
(EQ. 6)
(EQ. 7)
(EQ. 8)
4-6