ISL43640_14 Datasheet, PDF (6/13 Pages) Intersil Corporation – Low-Voltage, Single Supply, 4 to 1 Multiplexer, High Performance Analog Switch

ISL43640
Test Circuits and Waveforms
3V
LOGIC
INPUT
0V
50%
t_ON
t_r < 20ns
t_f < 20ns
SWITCH
OUTPUT _0V
t_OFF
90% ^VOUT
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
V+
C
C
V+
LOGIC
INPUT
NO0
NO1-NO3
COM
INH
ADD1,
GND ADD2
V_OUT
R_L
300Ω
C_L
35pF
Repeat test for other switches. C_L includes fixture and stray
capacitance.
V_OUT = V(NO _{or NC)} -_R----_L-----+--^R--_R---^L--₍--_O-----_N----₎
FIGURE 1B. TEST CIRCUIT
3V
LOGIC
INPUT
0V
SWITCH
OUTPUT
0V
50%
t_TRANS
90% ^VOUT
t_r < 20ns
t_f < 20ns
90%
C
V+
LOGIC
INPUT
V+
C
NO0
NO1-NO3
COM
ADD1
ADD2
GND INH
V_OUT
R_L
300Ω
C_L
35pF
t_TRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. C_L includes fixture and stray
capacitance.
V_OUT = V(NO _{or NC)} -_R----_L-----+--^R--_R---^L--₍--_O-----_N----₎
FIGURE 1C. ADDRESS MEASUREMENT POINTS
FIGURE 1D. ADDRESS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
LOGIC ^OFF
INPUT
ON
SWITCH
OUTPUT
V_OUT
Q = ∆V_OUT x C_L
3V
OFF
0V
∆V_OUT
V+
C
R_G
NO or NC
COM
V_OUT
ADD1
V_G
ADD2 _{GND INH}
C_L
LOGIC
INPUT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
FIGURE 2B. TEST CIRCUIT
6
FN6043.3
January 23, 2006