ISL37231 Datasheet, PDF (6/9 Pages) Intersil Corporation – 10.3125 Gb/s Retiming Dual-Channel Transceiver

ISL37231
Electrical Characteristics T_A = +25°C, V_DD1 = 1.0V, V_DD18 = 1.8V, unless otherwise noted
PARAMETERS
SYMBOL
CONDITION
MIN
(Note 12)
TYP
MAX
(Note 12) UNITS
NOTES
1.0V Supply Current
(Combination of all 1V
Supplies)
I_DD1 Both lanes active, after equalizer has trained
and is static, no eye monitors enabled
No lanes active, but microcontroller awake
430
510
mA
85
150
mA
Sleep Mode
4
mA
8
1.8V Supply Current
(Combination of all 1.8V
Supplies)
I_DD18
Both lanes active, after equalizer has trained
and is static, no eye monitors enabled
No lanes active, but microcontroller awake
25
55
mA
9
20
mA
Sleep Mode
330
µA
8
Return Loss Limit
(Differential)
S_DD11
S_DD22
0.05GHz to 2GHz
2GHz to 5.2GHz
-10
dB
9
-6
dB
9
5.2GHz to 7GHz
-5
dB
9
Return Loss Limit (Common
Mode)
Return Loss Limit (Diff. to
Com. Conversion)
Input Equalization Range
S_CC11
S_CC22
S_CD11
S_CD22
10MHz to 5GHz
10MHz to 5GHz
EQ gain at 5GHz compared to DC. Set to
minimum gain
-5
dB
9
-20
dB
9
dB
10
6
EQ gain at 5GHz compared to DC. Set to
maximum gain
16.5
dB
10
Input Equalization
Increment
10 steps covering the Equalization range
1.5
dB
Output De-Emphasis Level
Off-ramp channels optimized for PCB
dB
Range
dielectric loss. On-ramp channels optimized
0
for cable skin loss. Minimum setting
Off-ramp channels optimized for PCB
dB
dielectric loss. On-ramp channels optimized
9
for cable skin loss. Maximum setting
De-Emphasis Increment
1
dB
Number of De-Emphasis
Taps
3
11
Output Differential
Amplitude Range
Output Differential
Amplitude Increment
V_OUT Minimum drive setting
Maximum drive setting
15 Uniform Steps
200
mV_P-P
950
mV_P-P
50
mV_P-P
Output Transition Time
Jitter Transfer Function
Bandwidth
t_r, t_f
20% to 80%
45
ps
5
MHz
Total Output Jitter
1E-13 BER; PRBS-31; no low frequency input
periodic jitter
0.3
UI_P-P
SSC Down Spreading
Amplitude Tolerance
0.5
%
SSC Modulation Rate
Tolerance
33-37
kHz
NOTES:
8. The specified Sleep Mode currents can only be achieved when the ISL37231 is used in conjunction with the ISL80083 power management IC.
9. Measured with a Vector Network Analyzer with 100Ω -diff impedance and the ISL37231 input/output impedance at setting 0x07 (i.e. 100Ω-diff).
10. The equalization response includes all effects starting from the IC input pins up to the output of the equalization stage.
11. Three de-emphasis taps composed of: 1 pre-cursor + main + 1 post-cursor.
12. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
6
FN8266.1
January 25, 2013