CD4093BMS Datasheet, PDF (6/9 Pages) Intersil Corporation – CMOS Quad 2-Input NAND Schmitt Triggers

VDD
VI
VSS
VDD
VO
VSS
CD4093BMS
VP
VN
VH
VO
VH
VH = VP - VN
VI
VN _VP
(a) DEFINITION OF VP, VN, VH
(b) TRANSFER CHARACTERISTIC
OF 1 OF 4 GATES
FIGURE 1. HYSTERESIS DEFINITION, CHARACTERISTIC, AND TEST SETUP
VDD
VO
VI
(c) TEST SETUP
OUTPUT
CHARACTERISTIC
VOH
LOGIC “1”
OUTPUT
REGION
LOGIC “0”
OUTPUT
REGION
VDD
INPUT
CHARACTERISTIC
VP
VN
VOL
VSS
LOGIC “1”
INPUT
REGION
LOGIC “0”
INPUT
REGION
DRIVER
FIGURE 2. INPUT AND OUTPUT CHARACTERISTICS
VOH
VOL
VDD
LOAD
Typical Performance Curves
AMBIENT TEMPERATURE (T_A) = +25^oC
SUPPLY VOLTAGE (VDD) = 15V
15.0
CURRENT
VDD
PEAK
12.5
VDD
10V
10.0
5
VI ⁶
1.0
4
VO _1.0
CURRENT
7.5
PEAK
5V
5.0
VO
ALL
ID OTHER
ID
INPUTS
TO VDD
0.5
2.5
0
0
0 2.5 5.0 7.5 10.0 12.5 15.0
INPUT VOLTAGE (VI) (V)
FIGURE 3. TYPICAL CURRENT AND VOLTAGE TRANSFER
CHARACTERISTICS
SUPPLY VOLTAGE (VDD) = 15V
15
10V
10
VDD
VDD
5
VI ⁶
4 _VO
5V
5
-55^oC
+125^oC
ALL OTHER
PACKAGE
INPUTS
TO VDD
0
0
5
10
15
INPUT VOLTAGE (VI) (V)
FIGURE 4. TYPICAL VOLTAGE TRANSFER CHARACTERIS-
TICS AS A FUNCTION OF TEMPERATURE
7-1079