CD4085BMS Datasheet, PDF (6/9 Pages) Intersil Corporation – CMOS Dual 2 Wide 2 Input AND-OR-INVERT Gate

Schematic
INHIBIT 1 10 ^*
VDD
p
p
A1 1 ^*
B1 2 ^*
n
n
VSS
VDD
p
p
CD4085BMS
p
p
n
n
VDD
p
p
p
n
n
n
C1 12 ^*
D1 13 ^*
n
n
VSS
VDD
p
p
A2 5 ^*
B1 6 ^*
n
n
VSS
VDD
p
p
p
p
n
n
VSS
VDD
p
p
p
n
n
n
C2 8 ^*
D2 9 ^*
INHIBIT 2 11 *
n
n
VSS
TERM. 14 = VDD
TERM. 7 = VSS
VSS
* ^{ALL INPUTS PROTECTED BY}
CMOS PROTECTION NETWORK
FIGURE 1. CD408B SCHEMATIC DIAGRAM
p
3 E1
n
p
4 E2
n
VDD
VSS
7-1051