CD40160BMS Datasheet, PDF (6/13 Pages) Intersil Corporation – CMOS Synchronous Programmable 4-Bit Counters

CD40160BMS, CD40161BMS, CD40162BMS, CD40163BMS
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
Static Burn-In 1 Note 1
11 - 15
1 - 10
16
Static Burn-In 2 Note 1
11 - 15
8
1 - 7, 9, 10, 16
Dynamic Burn-In Note 1
-
8
1, 7, 9, 10, 16
11 - 15
2-6
-
Irradiation Note 2
11 - 15
8
1 - 7, 9, 10, 16
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
Logic Diagrams
CD40160BMS
ASYNCHRONOUS
CLEAR
LOAD*
9
CD40160BMS AND CD40162BMS BCD DECADE COUNTERS
*
7
PE
*
10
TE
*
3
P1
Q1
Q4
*
4
P2
Q1
Q4
*
5
P3
*
*
16
6
VDD P4
Q1
CLOCK*
2
CLEAR*
1
LOAD*
9
CLOCK*
2
CLEAR*
1
CD40162BMS
SYNCHRONOUS
CLEAR
Q1
LD PI Q1 LD PI Q2 LD PI Q3
T
CL
CLR
T
Q1 _CL
CLR
T
Q2 _CL
CLR
Q3
LD PI Q4
T
CL
CLR
Q4
*INPUTS PROTECTED BY
CMOS PROTECTION NETWORK
VDD
14 Q1
VSS
13 Q2
12 Q3
11 Q4
15 COUT
FIGURE 1. LOGIC DIAGRAM FOR CD40160BMS AND CD40162BMS BCD DECADE COUNTERS
4-6