CD40160BMS Datasheet, PDF (12/13 Pages) Intersil Corporation – CMOS Synchronous Programmable 4-Bit Counters

CD40160BMS, CD40161BMS, CD40162BMS, CD40163BMS
LOAD
VDD
P1 P2 P3 P4
PE LD
TE
CD
CLK CLR
P1 P2 P3 P4
VDD
PE LD
TE
CD
CLK CLR
P1 P2 P3 P4
PE LD
TE
CD
CLK CLR
CLOCK
CLEAR
Q1 Q2 Q3 Q4
Q1 Q2 Q3 Q4
Q1 Q2 Q3 Q4
FIGURE 14. CASCADED COUNTER PACKAGES IN THE PARALLEL-CLOCKED MODE
LOAD
VDD
P1 P2 P3 P4
PE LD
TE
CD
CLK CLR
CLOCK
Q1 Q2 Q3 Q4
VDD
P1 P2 P3 P4
PE LD
TE
CD
CLK CLR
Q1 Q2 Q3 Q4
VDD
P1 P2 P3 P4
PE LD
TE
CD
CLK CLR
Q1 Q2 Q3 Q4
CLEAR
FIGURE 15. CASCADED COUNTER PACKAGES IN THE RIPPLE-CLOCKED MODE
Chip Dimensions and Pad Layout
Dimensions and pad layout for CD40160BMSH.
Dimensions and pad layout for CD40161BMS,
CD40162BMSH, and CD40163BMSH are identical.
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10^-3 inch)
METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
4-12