X9409_06 Datasheet, PDF (5/20 Pages) Intersil Corporation – Quad Digitally Controlled Potentiometers

X9409
Four of the nine instructions end with the transmission
of the instruction byte. The basic sequence is
illustrated in Figure 3. These two-byte instructions
exchange data between the Wiper Counter Register
and one of the data registers. A transfer from a Data
Register to a Wiper Counter Register is essentially a
write to a static RAM. The response of the wiper to this
action will be delayed t_WRL. A transfer from the Wiper
Counter Register (current wiper position), to a Data
Register is a write to nonvolatile memory and takes a
minimum of t_WR to complete. The transfer can occur
between one of the four potentiometers and one of its
associated registers; or it may occur globally, wherein
the transfer occurs between all of the potentiometers
and one of their associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between
the host and the X9409; either between the host and
one of the data registers or directly between the host
and the Wiper Counter Register. These instructions
are: Read Wiper Counter Register (read the current
wiper position of the selected pot), Write Wiper
Counter Register (change current wiper position of the
selected pot), Read Data Register (read the contents
of the selected nonvolatile register) and Write Data
Register (write a new value to the selected Data
Register). The sequence of operations is shown in
Figure 4.
The Increment/Decrement command is different from
the other commands. Once the command is issued
and the X9409 has responded with an acknowledge,
the master can clock the selected wiper up and/or
down in one segment steps; thereby, providing a fine
tuning capability to the host. For each SCL clock pulse
(t_HIGH) while SDA is HIGH, the selected wiper will
move one resistor segment towards the V_H/R_H
terminal. Similarly, for each SCL clock pulse while
SDA is LOW, the selected wiper will move one resistor
segment towards the V_L/R_L terminal. A detailed
illustration of the sequence and timing for this
operation are shown in Figures 5 and 6 respectively.
Table 1. Instruction Set
Instruction Set
Instruction
I₃ I₂ I₁ I₀ R₁ R₀ P₁ P₀
Operation
Read Wiper Counter
Register
1 0 0 1 0 0 P₁ P₀ Read the contents of the Wiper Counter Register
pointed to by P₁ - P₀
Write Wiper Counter
Register
1 0 1 0 0 0 P₁ P₀ Write new value to the Wiper Counter Register
pointed to by P₁ - P₀
Read Data Register
1 0 1 1 R₁ R₀ P₁ P₀ Read the contents of the Data Register pointed to
by P₁ - P₀ and R₁ - R₀
Write Data Register
1 1 0 0 R₁ R₀ P₁ P₀ Write new value to the Data Register pointed to
by P₁ - P₀ and R₁ - R₀
XFR Data Register to
1 1 0 1 R₁ R₀ P₁ P₀ Transfer the contents of the Data Register
Wiper Counter Register
pointed to by P₁ - P₀ and R₁ - R₀ to its associated
Wiper Counter Register
XFR Wiper Counter
Register to Data
Register
Global XFR Data
Registers to Wiper
Counter Registers
1 1 1 0 R₁ R₀ P₁ P₀ Transfer the contents of the Wiper Counter
Register pointed to by P₁ - P₀ to the Data
Register pointed to by R₁ - R₀
0 0 0 1 R₁ R₀ 0
0 Transfer the contents of the Data Registers
pointed to by R₁ - R₀ of all four pots to their
respective Wiper Counter Registers
Global XFR Wiper
Counter Registers to
1 0 0 0 R₁ R₀ 0
0 Transfer the contents of both Wiper Counter
Registers to their respective Data Registers
Data Register
pointed to by R₁ - R₀ of all four pots
Increment/Decrement 0 0 1 0 0 0 P₁ P₀ Enable Increment/decrement of the WCR Latch
Wiper Counter Register
pointed to by P_{1 -} P₀
Note: (7) 1/0 = data is one or zero
5
FN8192.4
October 12, 2006