ISL6530 Datasheet, PDF (5/17 Pages) Intersil Corporation – Dual 5V Synchronous Buck Pulse-Width Modulator (PWM) Controller for DDRAM Memory VDDQ and VTT Termination

ISL6530
Absolute Maximum Ratings
Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Boot Voltage, V_BOOTn - V_PHASEn . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.3V to V_CC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . 0^oC to 70^oC
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . 0^oC to 125^oC
Thermal Information
Thermal Resistance
θ_JA (^oC/W) θ_JC (^oC/W)
SOIC Package (Note 1) . . . . . . . . . . . .
65
N/A
QFN Package (Note 2). . . . . . . . . . . . .
33
4
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150^oC
Maximum Storage Temperature Range . . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300^oC
(SOIC - Lead tips only)
For Recommended soldering conditions see Tech Brief TB389.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. θ_JC, the
“case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications Recommended Operating Conditions with Vcc = 5V, Unless Otherwise Noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
VCC SUPPLY CURRENT
Nominal Supply
Shutdown Supply
I_CC
OCSET/SD = V_CC;
-
5
UGATE1, UGATE2, LGATE1, and LGATE2
Open
OCSET/SD = 0V
-
3
POWER-ON RESET
Rising V_CC Threshold
Falling V_CC Threshold
OSCILLATOR
V_OCSET/SD = 4.5V
V_OCSET/SD = 4.5V
4.25
-
3.75
-
Free Running Frequency
REFERENCES
Reference Voltage
(V2 Error Amp Reference)
V_CC = 5
V_VREF SENSE1 = 2.5V
275
300
49.5
50
V1 Error Amp Reference Voltage
Tolerance
-
-
V1 Error Amp Reference
ERROR AMPLIFIERS
DC Gain
Gain-Bandwidth Product
Slew Rate
WINDOW REGULATOR
V_REF V_CC = 5
GBW
SR
COMP = 10pF
-
0.8
-
82
-
15
-
6
Load Current
-
±10
Output Voltage Error
V2_SD = VCC; ±10mA load on V2
-
±7
GATE DRIVERS
Upper Gate Source (UGATE1 and 2)
Upper Gate Sink (UGATE1 and 2)
Lower Gate Source (LGATE1 and 2)
Lower Gate Sink (LGATE1 and 2)
PROTECTION
OCSET/SD Current Source
OCSET/SD Disable Voltage
I_UGATE
I_UGATE
I_LGATE
I_LGATE
V_CC = 5V, V_UGATE = 2.5V
V_UGATE-PHASE = 2.5V
V_CC = 5V, V_LGATE = 2.5V
V_LGATE = 2.5V
I_OCSET
V_RESET
V_OCSET = 4.5VDC
-
-1
-
1
-
-1
-
2
34
40
-
0.8
MAX UNITS
-
mA
-
mA
4.5
V
4.0
V
325
kHz
50.5 %SENSE1
2
%
-
V
-
dB
-
MHz
-
V/µs
-
mA
%
-
A
-
A
-
A
-
A
46
µA
-
V
5
FN9052.2
November 15, 2004